Lines Matching +full:msi +full:- +full:base +full:- +full:vec
1 // SPDX-License-Identifier: GPL-2.0
52 * -----+-----+--------+--- in io7_device_interrupt()
57 * 0x0800 - 0x0ff0 - 0x0800 + (LSI id << 4) in io7_device_interrupt()
58 * 0x1000 - 0x2ff0 - 0x1000 + (MSI_DAT<8:0> << 4) in io7_device_interrupt()
61 irq = ((vector & 0xffff) - 0x800) >> 4; in io7_device_interrupt()
81 "%s for nonexistent io7 -- vec %x, pid %d\n", in io7_get_irq_ctl()
87 irq -= 16; /* subtract legacy bias */ in io7_get_irq_ctl()
91 "%s for invalid irq -- pid %d adjusted irq %x\n", in io7_get_irq_ctl()
96 ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */ in io7_get_irq_ctl()
97 if (irq >= 0x80) /* MSI */ in io7_get_irq_ctl()
98 ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr; in io7_get_irq_ctl()
108 unsigned int irq = d->irq; in io7_enable_irq()
118 raw_spin_lock(&io7->irq_lock); in io7_enable_irq()
122 raw_spin_unlock(&io7->irq_lock); in io7_enable_irq()
129 unsigned int irq = d->irq; in io7_disable_irq()
139 raw_spin_lock(&io7->irq_lock); in io7_disable_irq()
143 raw_spin_unlock(&io7->irq_lock); in io7_disable_irq()
166 .name = "MSI",
196 val = io7->csrs->PO7_LSI_CTL[which].csr; in io7_redirect_one_lsi()
200 io7->csrs->PO7_LSI_CTL[which].csr = val; in io7_redirect_one_lsi()
202 io7->csrs->PO7_LSI_CTL[which].csr; in io7_redirect_one_lsi()
213 val = io7->csrs->PO7_MSI_CTL[which].csr; in io7_redirect_one_msi()
217 io7->csrs->PO7_MSI_CTL[which].csr = val; in io7_redirect_one_msi()
219 io7->csrs->PO7_MSI_CTL[which].csr; in io7_redirect_one_msi()
228 io7->csrs->PO7_LSI_CTL[which].csr = ((unsigned long)where << 14); in init_one_io7_lsi()
230 io7->csrs->PO7_LSI_CTL[which].csr; in init_one_io7_lsi()
239 io7->csrs->PO7_MSI_CTL[which].csr = ((unsigned long)where << 14); in init_one_io7_msi()
241 io7->csrs->PO7_MSI_CTL[which].csr; in init_one_io7_msi()
249 long base = (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT) + 16; in init_io7_irqs() local
252 printk("Initializing interrupts for IO7 at PE %u - base %lx\n", in init_io7_irqs()
253 io7->pe, base); in init_io7_irqs()
266 raw_spin_lock(&io7->irq_lock); in init_io7_irqs()
269 io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, boot_cpuid); in init_io7_irqs()
270 io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, boot_cpuid); in init_io7_irqs()
271 io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, boot_cpuid); in init_io7_irqs()
272 io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, boot_cpuid); in init_io7_irqs()
273 io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, boot_cpuid); in init_io7_irqs()
277 irq_set_chip_and_handler(base + i, lsi_ops, handle_level_irq); in init_io7_irqs()
289 /* Set up the msi irqs. */ in init_io7_irqs()
291 irq_set_chip_and_handler(base + i, msi_ops, handle_level_irq); in init_io7_irqs()
298 raw_spin_unlock(&io7->irq_lock); in init_io7_irqs()
322 struct pci_controller *hose = dev->sysdata; in marvel_map_irq()
323 struct io7_port *io7_port = hose->sysdata; in marvel_map_irq()
324 struct io7 *io7 = io7_port->io7; in marvel_map_irq()
334 msi_loc = dev->msi_cap; in marvel_map_irq()
349 printk("PCI:%d:%d:%d (hose %d) is using MSI\n", in marvel_map_irq()
350 dev->bus->number, in marvel_map_irq()
351 PCI_SLOT(dev->devfn), in marvel_map_irq()
352 PCI_FUNC(dev->devfn), in marvel_map_irq()
353 hose->index); in marvel_map_irq()
359 (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT), in marvel_map_irq()
360 (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT)); in marvel_map_irq()
374 irq |= io7->pe << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */ in marvel_map_irq()
413 * There is a local IO7 - redirect all of its interrupts here. in marvel_smp_callin()
418 io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid); in marvel_smp_callin()
419 io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid); in marvel_smp_callin()
420 io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid); in marvel_smp_callin()
421 io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid); in marvel_smp_callin()
422 io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid); in marvel_smp_callin()