Lines Matching +full:1 +full:- +full:16
1 // SPDX-License-Identifier: GPL-2.0
50 unsigned long isa_enable = 1UL << 55; in tsunami_update_irq_hw()
59 mask1 = mask & cpu_irq_affinity[1]; in tsunami_update_irq_hw()
64 else if (bcpu == 1) mask1 |= isa_enable; in tsunami_update_irq_hw()
68 dim0 = &cchip->dim0.csr; in tsunami_update_irq_hw()
69 dim1 = &cchip->dim1.csr; in tsunami_update_irq_hw()
70 dim2 = &cchip->dim2.csr; in tsunami_update_irq_hw()
71 dim3 = &cchip->dim3.csr; in tsunami_update_irq_hw()
73 if (!cpu_possible(1)) dim1 = &dummy; in tsunami_update_irq_hw()
88 if (bcpu == 0) dimB = &cchip->dim0.csr; in tsunami_update_irq_hw()
89 else if (bcpu == 1) dimB = &cchip->dim1.csr; in tsunami_update_irq_hw()
90 else if (bcpu == 2) dimB = &cchip->dim2.csr; in tsunami_update_irq_hw()
91 else dimB = &cchip->dim3.csr; in tsunami_update_irq_hw()
103 cached_irq_mask |= 1UL << d->irq; in dp264_enable_irq()
112 cached_irq_mask &= ~(1UL << d->irq); in dp264_disable_irq()
121 cached_irq_mask |= 1UL << (d->irq - 16); in clipper_enable_irq()
130 cached_irq_mask &= ~(1UL << (d->irq - 16)); in clipper_disable_irq()
143 aff |= 1UL << irq; in cpu_set_irq_affinity()
145 aff &= ~(1UL << irq); in cpu_set_irq_affinity()
155 cpu_set_irq_affinity(d->irq, *affinity); in dp264_set_affinity()
167 cpu_set_irq_affinity(d->irq - 16, *affinity); in clipper_set_affinity()
197 pld = TSUNAMI_cchip->dir0.csr; in dp264_device_interrupt()
205 pld &= pld - 1; /* clear least bit set */ in dp264_device_interrupt()
209 handle_irq(16 + i); in dp264_device_interrupt()
218 irq = (vector - 0x800) >> 4; in dp264_srm_device_interrupt()
223 * 0x900 + (0x10 * DRIR-bit) in dp264_srm_device_interrupt()
225 * So bit 16 shows up as IRQ 32, etc. in dp264_srm_device_interrupt()
227 * On DP264/BRICK/MONET, we adjust it down by 16 because at least in dp264_srm_device_interrupt()
232 irq -= 16; in dp264_srm_device_interrupt()
242 irq = (vector - 0x800) >> 4; in clipper_srm_device_interrupt()
247 * 0x900 + (0x10 * DRIR-bit) in clipper_srm_device_interrupt()
249 * So bit 16 shows up as IRQ 32, etc. in clipper_srm_device_interrupt()
251 * CLIPPER uses bits 8-47 for PCI interrupts, so we do not need in clipper_srm_device_interrupt()
283 init_tsunami_irqs(&dp264_irq_type, 16, 47); in dp264_init_irq()
309 * 0-17 Unused
316 *24 Interrupt Line D from slot 1 PCI0
317 *25 Interrupt Line C from slot 1 PCI0
318 *26 Interrupt Line B from slot 1 PCI0
319 *27 Interrupt Line A from slot 1 PCI0
333 *40 Interrupt Line D from slot 1 PCI1
334 *41 Interrupt Line C from slot 1 PCI1
335 *42 Interrupt Line B from slot 1 PCI1
336 *43 Interrupt Line A from slot 1 PCI1
341 *48-52 Unused
345 *56-60 Unused
354 * 8 64 bit PCI option slot 1 (all busses)
380 { -1, -1, -1, -1, -1}, /* IdSel 5 ISA Bridge */ in dp264_map_irq()
381 { 16+ 3, 16+ 3, 16+ 2, 16+ 2, 16+ 2}, /* IdSel 6 SCSI builtin*/ in dp264_map_irq()
382 { 16+15, 16+15, 16+14, 16+13, 16+12}, /* IdSel 7 slot 0 */ in dp264_map_irq()
383 { 16+11, 16+11, 16+10, 16+ 9, 16+ 8}, /* IdSel 8 slot 1 */ in dp264_map_irq()
384 { 16+ 7, 16+ 7, 16+ 6, 16+ 5, 16+ 4}, /* IdSel 9 slot 2 */ in dp264_map_irq()
385 { 16+ 3, 16+ 3, 16+ 2, 16+ 1, 16+ 0} /* IdSel 10 slot 3 */ in dp264_map_irq()
388 struct pci_controller *hose = dev->sysdata; in dp264_map_irq()
392 irq += 16 * hose->index; in dp264_map_irq()
403 { -1, -1, -1, -1, -1}, /* IdSel 4 unused */ in monet_map_irq()
404 { -1, -1, -1, -1, -1}, /* IdSel 5 unused */ in monet_map_irq()
406 { -1, -1, -1, -1, -1}, /* IdSel 7 ISA Bridge */ in monet_map_irq()
407 { -1, -1, -1, -1, -1}, /* IdSel 8 P2P PCI1 */ in monet_map_irq()
408 #if 1 in monet_map_irq()
412 { -1, -1, -1, -1, -1}, /* IdSel 9 unused */ in monet_map_irq()
413 { -1, -1, -1, -1, -1}, /* IdSel 10 unused */ in monet_map_irq()
415 { 40, 40, 41, 42, 43}, /* IdSel 11 slot 1 PCI0*/ in monet_map_irq()
429 struct pci_controller *hose = dev->sysdata; in monet_swizzle()
432 if (!dev->bus->parent) { in monet_swizzle()
433 slot = PCI_SLOT(dev->devfn); in monet_swizzle()
435 /* Check for the built-in bridge on hose 1. */ in monet_swizzle()
436 else if (hose->index == 1 && PCI_SLOT(dev->bus->self->devfn) == 8) { in monet_swizzle()
437 slot = PCI_SLOT(dev->devfn); in monet_swizzle()
439 /* Must be a card-based bridge. */ in monet_swizzle()
441 /* Check for built-in bridge on hose 1. */ in monet_swizzle()
442 if (hose->index == 1 && in monet_swizzle()
443 PCI_SLOT(dev->bus->self->devfn) == 8) { in monet_swizzle()
444 slot = PCI_SLOT(dev->devfn); in monet_swizzle()
450 dev = dev->bus->self; in monet_swizzle()
452 slot = PCI_SLOT(dev->devfn); in monet_swizzle()
453 } while (dev->bus->self); in monet_swizzle()
464 { -1, -1, -1, -1, -1}, /* IdSel 7 ISA Bridge */ in webbrick_map_irq()
465 { -1, -1, -1, -1, -1}, /* IdSel 8 unused */ in webbrick_map_irq()
466 { 29, 29, 29, 29, 29}, /* IdSel 9 21143 #1 */ in webbrick_map_irq()
467 { -1, -1, -1, -1, -1}, /* IdSel 10 unused */ in webbrick_map_irq()
469 { -1, -1, -1, -1, -1}, /* IdSel 12 unused */ in webbrick_map_irq()
470 { -1, -1, -1, -1, -1}, /* IdSel 13 unused */ in webbrick_map_irq()
472 { 39, 39, 38, 37, 36}, /* IdSel 15 slot 1 */ in webbrick_map_irq()
473 { 43, 43, 42, 41, 40}, /* IdSel 16 slot 2 */ in webbrick_map_irq()
486 { 16+ 8, 16+ 8, 16+ 9, 16+10, 16+11}, /* IdSel 1 slot 1 */ in clipper_map_irq()
487 { 16+12, 16+12, 16+13, 16+14, 16+15}, /* IdSel 2 slot 2 */ in clipper_map_irq()
488 { 16+16, 16+16, 16+17, 16+18, 16+19}, /* IdSel 3 slot 3 */ in clipper_map_irq()
489 { 16+20, 16+20, 16+21, 16+22, 16+23}, /* IdSel 4 slot 4 */ in clipper_map_irq()
490 { 16+24, 16+24, 16+25, 16+26, 16+27}, /* IdSel 5 slot 5 */ in clipper_map_irq()
491 { 16+28, 16+28, 16+29, 16+30, 16+31}, /* IdSel 6 slot 6 */ in clipper_map_irq()
492 { -1, -1, -1, -1, -1} /* IdSel 7 ISA Bridge */ in clipper_map_irq()
494 const long min_idsel = 1, max_idsel = 7, irqs_per_slot = 5; in clipper_map_irq()
495 struct pci_controller *hose = dev->sysdata; in clipper_map_irq()
499 irq += 16 * hose->index; in clipper_map_irq()
516 SMC669_Init(1); in monet_init_pci()
533 /* Tsunami caches 4 PTEs at a time; DS10 has only 1 hose. */ in webbrick_init_arch()
534 hose_head->sg_isa->align_entry = 4; in webbrick_init_arch()
535 hose_head->sg_pci->align_entry = 4; in webbrick_init_arch()