118 	struct pci_controller *hose = pbus->sysdata;  in mk_conf_addr()  local
131 	addr |= hose->config_space_base;  in mk_conf_addr()
202 titan_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)  in titan_pci_tbi()  argument
205 	  (hose->index & 1) ? TITAN_pachip1 : TITAN_pachip0;  in titan_pci_tbi()
212 	if (hose->index & 2)   in titan_pci_tbi()
249 	struct pci_controller *hose;  in titan_init_one_pachip_port()  local
251 	hose = alloc_pci_controller();  in titan_init_one_pachip_port()
253 		pci_isa_hose = hose;  in titan_init_one_pachip_port()
254 	hose->io_space = alloc_resource();  in titan_init_one_pachip_port()
255 	hose->mem_space = alloc_resource();  in titan_init_one_pachip_port()
264 	hose->sparse_mem_base = 0;  in titan_init_one_pachip_port()
265 	hose->sparse_io_base = 0;  in titan_init_one_pachip_port()
266 	hose->dense_mem_base  in titan_init_one_pachip_port()
268 	hose->dense_io_base  in titan_init_one_pachip_port()
271 	hose->config_space_base = TITAN_CONF(index);  in titan_init_one_pachip_port()
272 	hose->index = index;  in titan_init_one_pachip_port()
274 	hose->io_space->start = TITAN_IO(index) - TITAN_IO_BIAS;  in titan_init_one_pachip_port()
275 	hose->io_space->end = hose->io_space->start + TITAN_IO_SPACE - 1;  in titan_init_one_pachip_port()
276 	hose->io_space->name = pci_io_names[index];  in titan_init_one_pachip_port()
277 	hose->io_space->flags = IORESOURCE_IO;  in titan_init_one_pachip_port()
279 	hose->mem_space->start = TITAN_MEM(index) - TITAN_MEM_BIAS;  in titan_init_one_pachip_port()
280 	hose->mem_space->end = hose->mem_space->start + 0xffffffff;  in titan_init_one_pachip_port()
281 	hose->mem_space->name = pci_mem_names[index];  in titan_init_one_pachip_port()
282 	hose->mem_space->flags = IORESOURCE_MEM;  in titan_init_one_pachip_port()
284 	if (request_resource(&ioport_resource, hose->io_space) < 0)  in titan_init_one_pachip_port()
286 	if (request_resource(&iomem_resource, hose->mem_space) < 0)  in titan_init_one_pachip_port()
318 	hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000,  in titan_init_one_pachip_port()
320 	hose->sg_isa->align_entry = 8; /* 64KB for ISA */  in titan_init_one_pachip_port()
322 	hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x40000000,  in titan_init_one_pachip_port()
324 	hose->sg_pci->align_entry = 4; /* Titan caches 4 PTEs at a time */  in titan_init_one_pachip_port()
326 	port->wsba[0].csr = hose->sg_isa->dma_base | 3;  in titan_init_one_pachip_port()
327 	port->wsm[0].csr  = (hose->sg_isa->size - 1) & 0xfff00000;  in titan_init_one_pachip_port()
328 	port->tba[0].csr  = virt_to_phys(hose->sg_isa->ptes);  in titan_init_one_pachip_port()
334 	port->wsba[2].csr = hose->sg_pci->dma_base | 3;  in titan_init_one_pachip_port()
335 	port->wsm[2].csr  = (hose->sg_pci->size - 1) & 0xfff00000;  in titan_init_one_pachip_port()
336 	port->tba[2].csr  = virt_to_phys(hose->sg_pci->ptes);  in titan_init_one_pachip_port()
349 	titan_pci_tbi(hose, 0, -1);  in titan_init_one_pachip_port()
460 	struct pci_controller *hose;	  in titan_ioremap()  local
479 	for (hose = hose_head; hose; hose = hose->next)  in titan_ioremap()
480 		if (hose->index == h)  in titan_ioremap()
482 	if (!hose)  in titan_ioremap()
497 	if (hose->sg_pci &&  in titan_ioremap()
498 	    baddr >= (unsigned long)hose->sg_pci->dma_base &&  in titan_ioremap()
499 	    last < (unsigned long)hose->sg_pci->dma_base + hose->sg_pci->size){  in titan_ioremap()
504 		baddr -= hose->sg_pci->dma_base;  in titan_ioremap()
505 		last -= hose->sg_pci->dma_base;  in titan_ioremap()
518 		ptes = hose->sg_pci->ptes;  in titan_ioremap()
601 	aper->arena = agp->hose->sg_pci;  in titan_agp_setup()
734 	struct pci_controller *hose;  in titan_agp_info()  local
753 	for (hose = hose_head; hose; hose = hose->next)  in titan_agp_info()
754 		if (hose->index == hosenum)  in titan_agp_info()
757 	if (!hose || !hose->sg_pci)  in titan_agp_info()
770 	agp->hose = hose;  in titan_agp_info()