34  * NOTE: Herein lie back-to-back mb instructions.  They are magic. 
84  *	The register selects a DWORD (32 bit) register offset.  Hence it
118 	mb();  in conf_read()
125 		mb();  in conf_read()
129 	mb();  in conf_read()
133 	mb();  in conf_read()
137 	mb();  in conf_read()
138 	mb();  /* magic */  in conf_read()
142 		mb();  in conf_read()
145 	mb();  in conf_read()
150 		mb();  in conf_read()
172 	mb();  in conf_write()
179 		mb();  in conf_write()
183 	mb();  in conf_write()
187 	mb();  in conf_write()
191 	mb();  in conf_write()
195 	mb();  in conf_write()
200 		mb();  in conf_write()
261 	mb();  in cia_pci_tbi()
291 	mb();  in cia_pci_tbi_try2()
294 	mb();  in cia_pci_tbi_try2()
296 	mb();  in cia_pci_tbi_try2()
298 	/* Read from PCI dense memory space at TBI_ADDR, skipping 32k on  in cia_pci_tbi_try2()
320 	mb();  in cia_pci_tbi_try2()
322 	mb();  in cia_pci_tbi_try2()
324 	mb();  in cia_pci_tbi_try2()
366 	mb();  in verify_tb_operation()
369 	mb();  in verify_tb_operation()
371 	mb();  in verify_tb_operation()
391 	mb();  in verify_tb_operation()
430 	mb();  in verify_tb_operation()
432 	mb();  in verify_tb_operation()
434 	mb();  in verify_tb_operation()
467 	mb();  in verify_tb_operation()
469 	mb();  in verify_tb_operation()
471 	mb();  in verify_tb_operation()
491 	mb();  in verify_tb_operation()
493 	mb();  in verify_tb_operation()
495 	mb();  in verify_tb_operation()
515 	mb();  in verify_tb_operation()
517 	mb();  in verify_tb_operation()
519 	mb();  in verify_tb_operation()
546 	mb();  in verify_tb_operation()
548 	mb();  in verify_tb_operation()
550 	mb();  in verify_tb_operation()
602 	mb();  in cia_save_srm_settings()
625 	mb();  in cia_restore_srm_settings()
680 	mb();  in do_init_arch()
718 	 * Window 0 is S/G 8MB at 8MB (for isa)  in do_init_arch()
719 	 * Window 1 is S/G 1MB at 768MB (for tbia) (unused for CIA rev 1)  in do_init_arch()
723 	 * ??? NetBSD hints that page tables must be aligned to 32K,  in do_init_arch()
725 	 * from the 8K alignment one would expect for an 8MB window.   in do_init_arch()
746 	   On CIA, we don't have true arbitrary addressing -- bits <39:32>  in do_init_arch()
771 		*(vip)CIA_IOC_PCI_W_DAC = alpha_mv.pci_dac_offset >> 32;  in do_init_arch()
831 	mb();  in cia_pci_clr_err()
873 			addr |= tmp << 32;  in cia_decode_pci_error()
917 			addr |= tmp << 32;  in cia_decode_pci_error()
952 	mem_port_addr |= (cia->mem_err1 & 0x83UL) << 32;  in cia_decode_mem_error()
1094 	addr |= (cia->cpu_err1 & 0x83UL) << 32;  in cia_decode_parity_error()
1205 	mb();  in cia_machine_check()
1206 	mb();  /* magic */  in cia_machine_check()
1210 	mb();  in cia_machine_check()