kvm/x86/timekeeping.rst

14    3) TSC Hardware
37 First we discuss the basic hardware devices available.  TSC and the related
324 3. TSC Hardware
327 The TSC or time stamp counter is relatively simple in theory; it counts
332 The TSC is represented internally as a 64-bit MSR which can be read with the
334 limitations made it possible to write the TSC, but generally on old hardware it
339 write the TSC MSR is not an architectural guarantee.
341 The TSC is accessible from CPL-0 and conditionally, for CPL > 0 software by
342 means of the CR4.TSD bit, which when enabled, disables CPL > 0 TSC access.
345 atomically not just the TSC, but an indicator which corresponds to the
346 processor number.  This can be used to index into an array of TSC variables to
352 allows the guest visible TSC to be offset by a constant.  Newer implementations
353 promise to allow the TSC to additionally be scaled, but this hardware is not
356 3.1. TSC synchronization
359 The TSC is a CPU-local clock in most implementations.  This means, on SMP
367 write the full 64-bits of the TSC, it may be impossible to match the TSC in
370 practice, getting a perfectly synchronized TSC will not be possible unless all
374 3.2. TSC and CPU hotplug
378 may not have a TSC value that is synchronized with the rest of the system.
379 Either system software, BIOS, or SMM code may actually try to establish the TSC
382 TSC is synchronized back to a state where TSC synchronization flaws, however
385 3.3. TSC and multi-socket / NUMA
404 3.4. TSC and C-states
408 states may be problematic for TSC as well.  The TSC may stop advancing in such
409 a state, resulting in a TSC which is behind that of other CPUs when execution
413 The TSC in such a case may be corrected by catching it up to a known external
416 3.5. TSC frequency change / P-states
420 may or may not run the TSC at the same rate, and because the frequency change
421 may be staggered or slewed, at some points in time, the TSC rate may not be
422 known other than falling within a range of values.  In this case, the TSC will
426 Whether the TSC runs at a constant rate or scales with the P-state is model
433 other processors.  In such cases, the TSC on halted CPUs could advance faster
437 3.6. TSC and STPCLK / T-states
441 the TSC.  This is typically done for thermal emergency power control to prevent
445 3.7. TSC virtualization - VMX
449 instructions, which is enough for full virtualization of TSC in any manner.  In
450 addition, VMX allows passing through the host TSC plus an additional TSC_OFFSET
454 3.8. TSC virtualization - SVM
458 instructions, which is enough for full virtualization of TSC in any manner.  In
459 addition, SVM allows passing through the host TSC plus an additional offset
462 3.9. TSC feature bits in Linux
465 In summary, there is no way to guarantee the TSC remains in perfect
470 The following feature bits are used by Linux to signal various TSC attributes,
474 X86_FEATURE_TSC			The TSC is available in hardware
476 X86_FEATURE_CONSTANT_TSC	The TSC rate is unchanged with P-states
477 X86_FEATURE_NONSTOP_TSC		The TSC does not stop in C-states
478 X86_FEATURE_TSC_RELIABLE	TSC sync checks are skipped (VMware)
531 4.2. TSC sampling and serialization
537 potentially unsynchronized source.  One issue which is not unique to the TSC,
544 measurement with the TSC, and requires a serializing instruction, such as CPUID
551 the TSC as seen from other CPUs, even in an otherwise perfectly synchronized
557 Additionally, this lack of serialization from the TSC poses another challenge
558 when using results of the TSC when measured against another time source.  As
559 the TSC is much higher precision, many possible values of the TSC may be read
564 fluctuates - from (T-1.. T+10).  Thus, any time calculated from a TSC, but
576 and any other values derived from TSC computation (such as TSC virtualization
588 An additional concern is that timers based off the TSC (or HPET, if the raw bus
591 migrating to a faster machine may preclude the use of a passthrough TSC, as a
595 simply storing multipliers and offsets against the TSC for the guest to convert