Lines Matching refs:MSR
15 Custom MSR list
18 The current supported Custom MSR list is:
35 guaranteed to update this data at the moment of MSR write.
37 to write more than once to this MSR. Fields have the following meanings:
54 particular MSR is global.
56 Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid
144 Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid
154 This MSR falls outside the reserved KVM range and may be removed in the
157 Availability of this MSR must be checked via bit 0 in 0x4000001 cpuid
166 This MSR falls outside the reserved KVM range and may be removed in the
169 Availability of this MSR must be checked via bit 0 in 0x4000001 cpuid
193 Asynchronous page fault (APF) control MSR.
209 Bits 5-4 of the MSR are reserved and should be zero. Bit 0 is set to 1
240 clearing the location; writing to the MSR forces KVM to re-scan its
243 Note, MSR_KVM_ASYNC_PF_INT MSR specifying the interrupt vector for 'page
245 in MSR_KVM_ASYNC_PF_EN or interrupt #0 can get injected. The MSR is
319 (using MSR or MMIO write); instead, it is sufficient to signal
357 Second asynchronous page fault (APF) control MSR.
364 is enabled in MSR_KVM_ASYNC_PF_EN. The MSR is only available if
375 write '1' to bit 0 of the MSR, this causes the host to re-scan its queue
376 and check if there are more notifications pending. The MSR is available
383 This MSR is available if KVM_FEATURE_MIGRATION_CONTROL is present in
389 ``KVM_HC_MAP_GPA_RANGE`` hypercall, it can set bit 0 in this MSR to