Lines Matching +full:cpu +full:- +full:2
28 - 上页表锁
29 - 清除页表项并通知 ([pmd/pte]p_huge_clear_flush_notify())
30 - 设置页表项以指向新页
37 两个地址addrA和addrB，这样|addrA - addrB| >= PAGE_SIZE，我们假设它们是COW的
42 [Time N] --------------------------------------------------------------------
43 CPU-thread-0 {尝试写到addrA}
44 CPU-thread-1 {尝试写到addrB}
45 CPU-thread-2 {}
46 CPU-thread-3 {}
47 DEV-thread-0 {读取addrA并填充设备TLB}
48 DEV-thread-2 {读取addrB并填充设备TLB}
49 [Time N+1] ------------------------------------------------------------------
50 CPU-thread-0 {COW_step0: {mmu_notifier_invalidate_range_start(addrA)}}
51 CPU-thread-1 {COW_step0: {mmu_notifier_invalidate_range_start(addrB)}}
52 CPU-thread-2 {}
53 CPU-thread-3 {}
54 DEV-thread-0 {}
55 DEV-thread-2 {}
56 [Time N+2] ------------------------------------------------------------------
57 CPU-thread-0 {COW_step1: {更新页表以指向addrA的新页}}
58 CPU-thread-1 {COW_step1: {更新页表以指向addrB的新页}}
59 CPU-thread-2 {}
60 CPU-thread-3 {}
61 DEV-thread-0 {}
62 DEV-thread-2 {}
63 [Time N+3] ------------------------------------------------------------------
64 CPU-thread-0 {preempted}
65 CPU-thread-1 {preempted}
66 CPU-thread-2 {写入addrA，这是对新页面的写入}
67 CPU-thread-3 {}
68 DEV-thread-0 {}
69 DEV-thread-2 {}
70 [Time N+3] ------------------------------------------------------------------
71 CPU-thread-0 {preempted}
72 CPU-thread-1 {preempted}
73 CPU-thread-2 {}
74 CPU-thread-3 {写入addrB，这是一个写入新页的过程}
75 DEV-thread-0 {}
76 DEV-thread-2 {}
77 [Time N+4] ------------------------------------------------------------------
78 CPU-thread-0 {preempted}
79 CPU-thread-1 {COW_step3: {mmu_notifier_invalidate_range_end(addrB)}}
80 CPU-thread-2 {}
81 CPU-thread-3 {}
82 DEV-thread-0 {}
83 DEV-thread-2 {}
84 [Time N+5] ------------------------------------------------------------------
85 CPU-thread-0 {preempted}
86 CPU-thread-1 {}
87 CPU-thread-2 {}
88 CPU-thread-3 {}
89 DEV-thread-0 {从旧页中读取addrA}
90 DEV-thread-2 {从新页面读取addrB}
92 所以在这里，因为在N+2的时候，清空页表项没有和通知一起作废二级TLB，设备在看到addrA的新值之前