Documentation/trace/hisi-ptt.rst

1 .. SPDX-License-Identifier: GPL-2.0
4 HiSilicon PCIe Tune and Trace device
10 HiSilicon PCIe tune and trace device (PTT) is a PCIe Root Complex
13 and trace the TLP headers (trace). The two functions are independent,
23           +--------------Core 0-------+
25           |       |       [Root Port]---[Endpoint]
26           |       |       [Root Port]---[Endpoint]
27           |       |       [Root Port]---[Endpoint]
28     Root Complex  |------Core 1-------+
30           |       |       [Root Port]---[ Switch ]---[Endpoint]
31           |       |       [Root Port]---[Endpoint] `-[Endpoint]
32           |       |       [Root Port]---[Endpoint]
33           +---------------------------+
71 ------------------------
76 - qos_tx_cpl: weight of Tx completion TLPs
77 - qos_tx_np: weight of Tx non-posted TLPs
78 - qos_tx_p: weight of Tx posted TLPs
90 2. Tx Path Buffer Control
91 -------------------------
93 Following files are provided to tune the buffer of tx path of the PCIe core.
95 - rx_alloc_buf_level: watermark of Rx requested
96 - tx_alloc_buf_level: watermark of Tx requested
98 These events influence the watermark of the buffer allocated for each
100 be stored in the buffer first and then transmitted either when the
102 increase the related buffer watermark to avoid frequently posting and
110 Trace  chapter
113 PTT trace is designed for dumping the TLP headers to the memory, which
117 device. It's also supported to trace the headers of certain type and of
121 trace and get the data. It's also supported to decode the trace
122 data with `perf report`. The control parameters for trace is inputted
127     $ perf record -e hisi_ptt0_2/filter=0x80001,type=1,direction=1,
128       format=1/ -- sleep 5
130 This will trace the TLP headers downstream root port 0000:00:10.1 (event
135 ---------
137 The TLP headers to trace can be filtered by the Root Ports or the Requester ID
140 the trace. The parameter value is 20 bit. Bit 19 indicates the filter type.
145 reserved for extension.
158 Endpoint function can be specified in one trace. Specifying both Root Port
167 -------
169 You can trace the TLP headers of certain types by specifying the `type`
170 parameter, which is required to start the trace. The parameter value is
173 - 8'b00000001: posted requests (P)
174 - 8'b00000010: non-posted requests (NP)
175 - 8'b00000100: completions (CPL)
181 ------------
183 You can trace the TLP headers from certain direction, which is relative
189 - 4'b0000: inbound TLPs (P, NP, CPL)
190 - 4'b0001: outbound TLPs (P, NP, CPL)
191 - 4'b0010: outbound TLPs (P, NP, CPL) and inbound TLPs (P, NP, CPL B)
192 - 4'b0011: outbound TLPs (P, NP, CPL) and inbound TLPs (CPL A)
197 - 4'b0000: reserved
198 - 4'b0001: outbound TLPs (P, NP, CPL)
199 - 4'b0010: inbound TLPs (P, NP, CPL B)
200 - 4'b0011: inbound TLPs (CPL A)
204 - completion A (CPL A): completion of CHI/DMA/Native non-posted requests, except for CPL B
205 - completion B (CPL B): completion of DMA remote2local and P2P non-posted requests
208 --------------
214 - 4'b0000: 4DW length per TLP header
215 - 4'b0001: 8DW length per TLP header
220 (Header DW0-3 shown below). For example, the TLP header for Memory
221 Reads with 64-bit addresses is shown in PCIe r5.0, Figure 2-17;
224 In addition, 8DW trace buffer entries contain a timestamp and
225 possibly a prefix for a PASID TLP prefix (see Figure 6-20, PCIe r5.0).
233          |---------------------------------------|-------------------|
243 When using the 4DW data format, DW0 of the trace buffer entry
245 timestamp.  DW1-DW3 of the trace buffer entry contain DW1-DW3
252          |-----|---------|---|---|---|---|-------------|-------------|
259 --------------------
263 and writes the buffer sequentially like below. If DMA addr 3 is
264 finished and the trace is still on, it will return to addr 0.
267     +->[DMA addr 0]->[DMA addr 1]->[DMA addr 2]->[DMA addr 3]-+
268     +---------------------------------------------------------+
270 Driver will allocate each DMA buffer of 4MiB. The finished buffer
271 will be copied to the perf AUX buffer allocated by the perf core.
272 Once the AUX buffer is full while the trace is still on, driver
273 will commit the AUX buffer first and then apply for a new one with
274 the same size. The size of AUX buffer is default to 16MiB. User can
275 adjust the size by specifying the `-m` parameter of the perf command.
278 -----------
280 You can decode the traced data with `perf report -D` command (currently
281 only support to dump the raw trace data). The traced data will be decoded