Lines Matching +full:rx +full:- +full:watermark
1 .. SPDX-License-Identifier: GPL-2.0
23 +--------------Core 0-------+
25 | | [Root Port]---[Endpoint]
26 | | [Root Port]---[Endpoint]
27 | | [Root Port]---[Endpoint]
28 Root Complex |------Core 1-------+
30 | | [Root Port]---[ Switch ]---[Endpoint]
31 | | [Root Port]---[Endpoint] `-[Endpoint]
32 | | [Root Port]---[Endpoint]
33 +---------------------------+
71 ------------------------
76 - qos_tx_cpl: weight of Tx completion TLPs
77 - qos_tx_np: weight of Tx non-posted TLPs
78 - qos_tx_p: weight of Tx posted TLPs
91 -------------------------
95 - rx_alloc_buf_level: watermark of Rx requested
96 - tx_alloc_buf_level: watermark of Tx requested
98 These events influence the watermark of the buffer allocated for each
99 type. Rx means the inbound while Tx means outbound. The packets will
101 watermark reached or when timed out. For a busy direction, you should
102 increase the related buffer watermark to avoid frequently posting and
127 $ perf record -e hisi_ptt0_2/filter=0x80001,type=1,direction=1,
128 format=1/ -- sleep 5
135 ---------
167 -------
173 - 8'b00000001: posted requests (P)
174 - 8'b00000010: non-posted requests (NP)
175 - 8'b00000100: completions (CPL)
181 ------------
189 - 4'b0000: inbound TLPs (P, NP, CPL)
190 - 4'b0001: outbound TLPs (P, NP, CPL)
191 - 4'b0010: outbound TLPs (P, NP, CPL) and inbound TLPs (P, NP, CPL B)
192 - 4'b0011: outbound TLPs (P, NP, CPL) and inbound TLPs (CPL A)
197 - 4'b0000: reserved
198 - 4'b0001: outbound TLPs (P, NP, CPL)
199 - 4'b0010: inbound TLPs (P, NP, CPL B)
200 - 4'b0011: inbound TLPs (CPL A)
204 - completion A (CPL A): completion of CHI/DMA/Native non-posted requests, except for CPL B
205 - completion B (CPL B): completion of DMA remote2local and P2P non-posted requests
208 --------------
214 - 4'b0000: 4DW length per TLP header
215 - 4'b0001: 8DW length per TLP header
220 (Header DW0-3 shown below). For example, the TLP header for Memory
221 Reads with 64-bit addresses is shown in PCIe r5.0, Figure 2-17;
225 possibly a prefix for a PASID TLP prefix (see Figure 6-20, PCIe r5.0).
233 |---------------------------------------|-------------------|
245 timestamp. DW1-DW3 of the trace buffer entry contain DW1-DW3
252 |-----|---------|---|---|---|---|-------------|-------------|
259 --------------------
267 +->[DMA addr 0]->[DMA addr 1]->[DMA addr 2]->[DMA addr 3]-+
268 +---------------------------------------------------------+
275 adjust the size by specifying the `-m` parameter of the perf command.
278 -----------
280 You can decode the traced data with `perf report -D` command (currently