Documentation/spi/spi-summary.rst

2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body.  SPI uses a host/target configuration.
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI hosts use a fourth "chip select" line to activate a given SPI target
24 in parallel.  All SPI targets support chipselects; they are usually active
29 SPI target functions are usually not interoperable between vendors
30 (except for commodities like SPI memory chips).
32   - SPI may be used for request/response style device protocols, as with
35   - It may also be used to stream data in either direction (half duplex),
38   - Some devices may use eight bit words.  Others may use different word
39     lengths, such as streams of 12-bit or 20-bit digital samples.
41   - Words are usually sent with their most significant bit (MSB) first,
44   - Sometimes SPI is used to daisy-chain devices, like shift registers.
46 In the same way, SPI targets will only rarely support any kind of automatic
48 a given SPI host controller will normally be set up manually, with
51 SPI is only one of the names used by such four-wire protocols, and
53 half-duplex SPI, for request/response protocols), SSP ("Synchronous
58 limiting themselves to half-duplex at the hardware level.  In fact
59 some SPI chips have this signal mode as a strapping option.  These
60 can be accessed using the same programming interface as SPI, but of
65 Microcontrollers often support both host and target sides of the SPI
67 sides of SPI interactions.
71 ---------------------------------------
72 Linux developers using SPI are probably writing device drivers for embedded
73 systems boards.  SPI is used to control external chips, and it is also a
76 support only SPI.)  Some PC hardware uses SPI flash for BIOS code.
78 SPI target chips range from digital/analog converters used for analog
82 Most systems using SPI will integrate a few devices on a mainboard.
83 Some provide SPI links on expansion connectors; in cases where no
84 dedicated SPI controller exists, GPIO pins can be used to create a
85 low speed "bitbanging" adapter.  Very few systems will "hotplug" an SPI
86 controller; the reasons to use SPI focus on low cost and simple operation,
88 appropriate low-pincount peripheral bus.
91 interfaces with SPI modes.  Given SPI support, they could use MMC or SD
92 cards without needing a special purpose MMC/SD/SDIO controller.
95 I'm confused.  What are these four SPI "clock modes"?
96 -----------------------------------------------------
100  - CPOL indicates the initial clock polarity.  CPOL=0 means the
105  - CPHA indicates the clock phase used to sample data; CPHA=0 says
112 Chip specs won't always say "uses SPI mode X" in as many words,
115 In the SPI mode number, CPOL is the high order bit and CPHA is the
118 trailing clock edge (CPHA=1), that's SPI mode 1.
129 ------------------------------------------------
130 The <linux/spi/spi.h> header file includes kerneldoc, as does the
135 SPI requests always go into I/O queues.  Requests for a given SPI device
141 There are two types of SPI driver, here called:
143   Controller drivers ...
144         controllers may be built into System-On-Chip
145 	processors, and often support both Controller and target roles.
150         these pass messages through the controller
151 	driver to communicate with a target or Controller device on the
152 	other side of an SPI link.
155 data to filesystems stored on SPI flash like DataFlash; and others might
158 And those might all be sharing the same controller driver.
160 A "struct spi_device" encapsulates the controller-side interface between
163 There is a minimal core of SPI programming interfaces, focussing on
164 using the driver model to connect controller and protocol drivers using
165 device tables provided by board specific initialization code.  SPI
168    /sys/devices/.../CTLR ... physical node for a given SPI controller
173    /sys/bus/spi/devices/spiB.C ... symlink to that physical
179    /sys/bus/spi/drivers/D ... driver for one or more spi*.* devices
182 	class related state for the SPI host controller managing bus "B".
183 	All spiB.* devices share one physical SPI bus segment, with SCLK,
187 	target device for an SPI target controller.
188 	Writing the driver name of an SPI target handler to this file
195 	class related state for the SPI target controller on bus "B".  When
197 	the physical SPI bus segment with other SPI target devices.
199 At this time, the only class-specific state is the bus number ("B" in "spiB"),
203 How does board-specific init code declare SPI devices?
204 ------------------------------------------------------
205 Linux needs several kinds of information to properly configure SPI devices.
206 That information is normally provided by board-specific code, even for
212 The first kind of information is a list of what SPI controllers exist.
213 For System-on-Chip (SOC) based boards, these will usually be platform
214 devices, and the controller may need some platform_data in order to
216 like the physical address of the controller's first register and its IRQ.
218 Platforms will often abstract the "register SPI controller" operation,
220 the arch/.../mach-*/board-*.c files for several boards can all share the
221 same basic controller setup code.  This is because most SOCs have several
222 SPI-capable controllers, and only the ones actually usable on a given
225 So for example arch/.../mach-*/board-*.c files might have code like::
227 	#include <mach/spi.h>	/* for mysoc_spi_data */
229 	/* if your mach-* infrastructure doesn't support kernels that can
237 		/* this board only uses SPI controller #2 */
242 And SOC-specific utility code might look something like::
244 	#include <mach/spi.h>
256 			spi2->dev.platform_data = pdata2;
269 same SOC controller is used.  For example, on one board SPI might use
270 an external clock, where another derives the SPI clock from current
276 The second kind of information is a list of what SPI target devices exist
277 on the target board, often with some board-specific data needed for the
280 Normally your arch/.../mach-*/board-*.c files would provide a small table
281 listing the SPI devices on each board.  (This would typically be only a
302 Again, notice how board-specific information is provided; each chip may need
303 several types.  This example shows generic constraints like the fastest SPI
305 is wired, plus chip-specific constraints like an important delay that's
309 controller driver.  An example would be peripheral-specific DMA tuning
318 Then your board initialization code would register that table with the SPI
319 infrastructure, so that it's available later when the SPI host controller
324 Like with other static board-specific setup, you won't unregister those.
328 your ``arch/.../mach-.../board-*.c`` file would primarily provide information
330 certainly includes SPI devices hooked up through the card connectors!
333 Non-static Configurations
336 When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those
341 How do I write an "SPI Protocol Driver"?
342 ----------------------------------------
343 Most SPI drivers are currently kernel drivers, but there's also support
346 SPI protocol drivers somewhat resemble platform device drivers::
358 The driver core will automatically attempt to bind this driver to any SPI
365 	static int CHIP_probe(struct spi_device *spi)
370 		/* assuming the driver requires board-specific data: */
371 		pdata = &spi->dev.platform_data;
373 			return -ENODEV;
375 		/* get memory for driver's per-chip state */
378 			return -ENOMEM;
379 		spi_set_drvdata(spi, chip);
386 the SPI device using "struct spi_message".  When remove() returns,
390   - An spi_message is a sequence of protocol operations, executed
391     as one atomic sequence.  SPI driver controls include:
416   - Follow standard kernel rules, and provide DMA-safe buffers in
417     your messages.  That way controller drivers using DMA aren't forced
421   - The basic I/O primitive is spi_async().  Async requests may be
427   - There are also synchronous wrappers like spi_sync(), and wrappers
432   - The spi_write_then_read() call, and convenience wrappers around
435     common RPC-style requests, such as writing an eight bit command
436     and reading a sixteen bit response -- spi_w8r16() being one its
451 of interacting with SPI devices.
453   - I/O buffers use the usual Linux rules, and must be DMA-safe.
457   - The spi_message and spi_transfer metadata used to glue those
460     other allocate-once driver data structures.  Zero-init these.
463 routines are available to allocate and zero-initialize an spi_message
467 How do I write an "SPI Controller Driver"?
468 -------------------------------------------------
469 An SPI controller will probably be registered on the platform_bus; write
473 Use spi_alloc_host() to allocate the host controller, and
474 spi_controller_get_devdata() to get the driver-private data allocated for that
480 	struct CONTROLLER	*c;
484 		return -ENODEV;
490 interact with the SPI core and SPI protocol drivers.  It will also initialize
495 controller and any predeclared spi devices will be made available, and
498 If you need to remove your SPI controller driver, spi_unregister_controller()
506 SPI bus (shared SCK, MOSI, MISO).  Valid bus numbers start at zero.  On
508 manufacturer.  For example, hardware controller SPI2 would be bus number 2,
511 If you don't have such hardware-assigned bus number, and for some reason
514 this as a non-static configuration (see above).
517 SPI Host Controller Methods
520 ``ctlr->setup(struct spi_device *spi)``
521 	This sets up the device clock rate, SPI mode, and word sizes.
523 	call spi_setup(spi) to invoke this routine.  It may sleep.
525 	Unless each SPI target has its own configuration registers, don't
527 	that's in progress for other SPI devices.
533 		When you code setup(), ASSUME that the controller
536 ``ctlr->cleanup(struct spi_device *spi)``
537 	Your controller driver may use spi_device.controller_state to hold
541 ``ctlr->prepare_transfer_hardware(struct spi_controller *ctlr)``
547 ``ctlr->unprepare_transfer_hardware(struct spi_controller *ctlr)``
552 ``ctlr->transfer_one_message(struct spi_controller *ctlr, struct spi_message *mesg)``
559 ``ctrl->transfer_one(struct spi_controller *ctlr, struct spi_device *spi, struct spi_transfer *tran…
574 ``ctrl->set_cs_timing(struct spi_device *spi, u8 setup_clk_cycles, u8 hold_clk_cycles, u8 inactive_…
575 	This method allows SPI client drivers to request SPI host controller
582 ``ctrl->transfer(struct spi_device *spi, struct spi_message *message)``
586 	if the controller is idle it will need to be kickstarted. This
592 SPI Message Queue
596 SPI subsystem, just implement the queued methods specified above. Using
598 providing pure process-context execution of methods. The message queue
599 can also be elevated to realtime priority on high-priority SPI traffic.
601 Unless the queueing mechanism in the SPI subsystem is selected, the bulk
606 for low-frequency sensor access might be fine using synchronous PIO.
608 But the queue will probably be very real, using message->queue, PIO,
609 often DMA (especially if the root filesystem is in SPI flash), and
617 Extensions to the SPI protocol
618 ------------------------------
619 The fact that SPI doesn't have a formal specification or standard permits chip
620 manufacturers to implement the SPI protocol in slightly different ways. In most
621 cases, SPI protocol implementations from different vendors are compatible among
622 each other. For example, in SPI mode 0 (CPOL=0, CPHA=0) the bus lines may behave
646   ; marks when data is clocked into the controller;
649 In some few cases, chips extend the SPI protocol by specifying line behaviors
650 that other SPI protocols don't (e.g. data line state for when CS is not
651 asserted). Those distinct SPI protocols, modes, and configurations are supported
652 by different SPI mode flags.
657 Common SPI protocol implementations don't specify any state or behavior for the
658 MOSI line when the controller is not clocking out data. However, there do exist
661 controller is not clocking out data (``SPI_MOSI_IDLE_HIGH``), then a transfer in
662 SPI mode 0 would look like the following:
685   ; marks when data is clocked into the controller;
688 In this extension to the usual SPI protocol, the MOSI line state is specified to
689 be kept high when CS is asserted but the controller is not clocking out data to
701 ---------
702 Contributors to Linux-SPI discussions include (in alphabetical order,
705 - Mark Brown
706 - David Brownell
707 - Russell King
708 - Grant Likely
709 - Dmitry Pervushin
710 - Stephen Street
711 - Mark Underwood
712 - Andrew Victor
713 - Linus Walleij
714 - Vitaly Wool