Documentation/power/pci.rst

2 PCI Power Management
7 An overview of concepts and the Linux kernel's interfaces related to PCI power
11 This document only covers the aspects of power management specific to PCI
13 power management refer to Documentation/driver-api/pm/devices.rst and
14 Documentation/power/runtime_pm.rst.
18    1. Hardware and Platform Support for PCI Power Management
19    2. PCI Subsystem and Device Power Management
20    3. PCI Device Drivers and Power Management
24 1. Hardware and Platform Support for PCI Power Management
27 1.1. Native and Platform-Based Power Management
28 -----------------------------------------------
30 In general, power management is a feature allowing one to save energy by putting
31 devices into states in which they draw less power (low-power states) at the
34 Usually, a device is put into a low-power state when it is underutilized or
36 again, it has to be put back into the "fully functional" state (full-power
41 PCI devices may be put into low-power states in two ways, by using the device
42 capabilities introduced by the PCI Bus Power Management Interface Specification,
44 approach, that is referred to as the native PCI power management (native PCI PM)
45 in what follows, the device power state is changed as a result of writing a
48 used by the kernel to change the device's power state.
51 Power Management Events (PMEs) to let the kernel know about external events
53 to put the device that sent it into the full-power state.  However, the PCI Bus
54 Power Management Interface Specification doesn't define any standard method of
62 the power state of a device, usually the platform also provides a method for
68 Thus in many situations both the native and the platform-based power management
71 1.2. Native PCI Power Management
72 --------------------------------
74 The PCI Bus Power Management Interface Specification (PCI PM Spec) was
76 standard interface for performing various operations related to power
81 Spec, it has an 8 byte power management capability field in its PCI
83 features related to the native PCI power management.
85 The PCI PM Spec defines 4 operating states for devices (D0-D3) and for buses
86 (B0-B3).  The higher the number, the less power is drawn by the device or bus
88 the device or bus to return to the full-power state (D0 or B0, respectively).
98 PCI bus power management, however, is not supported by the Linux kernel at the
101 Note that every PCI device can be in the full-power state (D0) or in D3cold,
104 as well as D0.  The support for the D1 and D2 power states is optional.
107 supported low-power states (except for D3cold).  While in D1-D3hot the
112 forth between D0 and the supported low-power states (except for D3cold) and the
113 possible power state transitions the device can undergo are the following:
115 +----------------------------+
117 +----------------------------+
119 +----------------------------+
121 +----------------------------+
123 +----------------------------+
125 +----------------------------+
128 the device (i.e. power is restored).  In that case the device returns to D0 with
129 a full power-on reset sequence and the power-on defaults are restored to the
130 device by hardware just as at initial power up.
133 while in any power state (D0-D3), but they are not required to be capable
134 of generating PMEs from all supported power states.  In particular, the
139 1.3. ACPI Device Power Management
140 ---------------------------------
142 The platform firmware support for the power management of PCI devices is
143 system-specific.  However, if the system in question is compliant with the
144 Advanced Configuration and Power Interface (ACPI) Specification, like the
145 majority of x86-based systems, it is supposed to implement device power
150 putting a device into a low-power state.  These control methods are encoded
151 using special byte-code language called the ACPI Machine Language (AML) and
156 on the system design in a system-specific fashion.
163 ACPI methods used for device power management fall into that category.
165 The ACPI specification assumes that devices can be in one of four power states
167 D0-D3 states (although the difference between D3hot and D3cold is not taken
168 into account by ACPI).  Moreover, for each power state of a device there is a
169 set of power resources that have to be enabled for the device to be put into
170 that state.  These power resources are controlled (i.e. enabled or disabled)
174 To put a device into the ACPI power state Dx (where x is a number between 0 and
175 3 inclusive) the kernel is supposed to (1) enable the power resources required
178 is going to be put into a low-power state (D1-D3) and is supposed to generate
180 3.0) control method defined for it has to be executed before _PSx.  Power
181 resources that are not required by the device in the target power state and are
183 _OFF control methods).  If the current power state of the device is D3, it can
186 However, quite often the power states of devices are changed during a
187 system-wide transition into a sleep state or back into the working state.  ACPI
190 determines the highest power (lowest number) state the device can be put
194 lowest power (highest number) state it can be put into is also determined by the
197 use the device's _PRW control method to learn which power resources need to be
201 ---------------------
205 putting the device into a low-power state, have to be caught and handled as
208 put the devices generating them into the full-power state and take care of the
212 On ACPI-based systems wakeup signals sent by conventional PCI devices are
213 converted into ACPI General-Purpose Events (GPEs) which are hardware signals
229 the ACPI S1-S4 states), in which case system wakeup is started by its core logic
244 conventional PCI devices on systems that are not ACPI-based, but there is one
247 root ports.  For conventional PCI devices native PMEs are out-of-band, so they
250 they are in-band messages that have to pass through the PCI Express hierarchy,
261 In principle the native PCI Express PME signaling may also be used on ACPI-based
269 2. PCI Subsystem and Device Power Management
272 2.1. Device Power Management Callbacks
273 --------------------------------------
275 The PCI Subsystem participates in the power management of PCI devices in a
277 the device power management core (PM core) and PCI device drivers.
280 pointers to several device power management callbacks::
303 device power management and they, in turn, execute power management callbacks
304 provided by PCI device drivers.  They also perform power management operations
319 	unsigned int	d1_support:1;	/* Low power state D1 is supported */
320 	unsigned int	d2_support:1;	/* Low power state D2 is supported */
323 	unsigned int	d3hot_delay;	/* D3hot->D0 transition time in ms */
331 --------------------------
333 The PCI subsystem's first task related to device power management is to
334 prepare the device for power management and initialize the fields of struct
339 and if that's the case the offset of its power management capability structure
341 pci_dev object.  Next, the function checks which PCI low-power states are
342 supported by the device and from which low-power states the device can generate
343 native PCI PMEs.  The power management fields of the device's struct pci_dev and
350 device's struct pci_dev and uses the firmware-provided method to prevent the
353 At this point the device is ready for power management.  For driverless devices,
355 during system-wide transitions to a sleep state and back to the working state.
357 2.3. Runtime Device Power Management
358 ------------------------------------
360 The PCI subsystem plays a vital role in the runtime power management of PCI
361 devices.  For this purpose it uses the general runtime power management
362 (runtime PM) framework described in Documentation/power/runtime_pm.rst.
363 Namely, it provides subsystem-level callbacks::
371 in low-power states, which at the time of this writing works for both the native
372 PCI Express PME signaling and the ACPI GPE-based wakeup signaling described in
375 First, a PCI device is put into a low-power state, or suspended, with the help
378 driver has to provide a pm->runtime_suspend() callback (see below), which is
382 the target low-power state.
384 The low-power state to put the device into is the lowest-power (highest number)
386 system-dependent and is determined by the PCI subsystem on the basis of the
388 device for signaling wakeup and put it into the selected low-power state, the
392 It is expected that the device driver's pm->runtime_suspend() callback will
394 low-power state.  The driver ought to leave these tasks to the PCI subsystem
400 driver provides a pm->runtime_resume() callback (see below).  However, before
402 back into the full-power state, prevents it from signaling wakeup while in that
404 callback need not worry about the PCI-specific aspects of the device resume.
416 and pm_request_idle(), executes the device driver's pm->runtime_idle()
424 pm->runtime_idle() callback.
426 2.4. System-Wide Power Transitions
427 ----------------------------------
428 There are a few different types of system-wide power transitions, described in
429 Documentation/driver-api/pm/devices.rst.  Each of them requires devices to be
430 handled in a specific way and the PM core executes subsystem-level power
432 each phase involves executing the same subsystem-level callback for every device
440 be preserved, such as one of the ACPI sleep states S1-S3, the phases are:
452 driver's pm->prepare() callback if defined (i.e. if the driver's struct
462 bridges are ignored by this routine).  Next, the device driver's pm->suspend()
480 returns success.  Otherwise the device driver's pm->suspend_noirq() callback is
485 a low-power state.
487 The low-power state to put the device into is the lowest-power (highest number)
490 signaling wakeup is system-dependent and determined by the PCI subsystem, which
494 PCI device drivers (that don't implement legacy power management callbacks) are
496 into low-power states.  However, if one of the driver's suspend callbacks
497 (pm->suspend() or pm->suspend_noirq()) saves the device's standard configuration
499 to signal wakeup and put into a low-power state by the driver (the driver is
509 S1-S3, into the working state (ACPI S0), the phases are:
520 The pci_pm_resume_noirq() routine first puts the device into the full-power
524 legacy PCI power management callbacks (this way all PCI devices are in the
525 full-power state and their standard configuration registers have been restored
528 by drivers whose devices are still suspended).  If legacy PCI power management
531 device driver's pm->resume_noirq() callback is executed, if defined, and its
538 device's driver implements legacy PCI power management callbacks (see
541 its driver's pm->resume() callback is executed, if defined (the callback's
549 The pci_pm_complete() routine only executes the device driver's pm->complete()
576 the device driver's pm->freeze() callback, if defined, instead of pm->suspend(),
577 and it doesn't apply the suspend-related hardware quirks.  It is executed
582 pci_pm_suspend_noirq(), but it calls the device driver's pm->freeze_noirq()
583 routine instead of pm->suspend_noirq().  It also doesn't attempt to prepare the
584 device for signaling wakeup and put it into a low-power state.  Still, it saves
604 It puts the device into the full power state and restores its standard
605 configuration registers.  It also executes the device driver's pm->thaw_noirq()
606 callback, if defined, instead of pm->resume_noirq().
609 driver's pm->thaw() callback instead of pm->resume().  It is executed
616 enter the target sleep state (ACPI S4 for ACPI-based systems).  This is done in
623 The PCI subsystem-level callbacks they correspond to::
636 pre-hibernation memory contents to be restored before the pre-hibernation system
639 As described in Documentation/driver-api/pm/devices.rst, the hibernation image
653 Should the restoration of the pre-hibernation memory contents fail, the boot
658 If the pre-hibernation memory contents are restored successfully, which is the
661 it must restore the devices' pre-hibernation functionality, which is done much
675 respectively, but they execute the device driver's pm->restore_noirq() and
676 pm->restore() callbacks, if available.
682 3. PCI Device Drivers and Power Management
685 3.1. Power Management Callbacks
686 -------------------------------
688 PCI device drivers participate in power management by providing callbacks to be
689 executed by the PCI subsystem's power management routines described above and by
690 controlling the runtime power management of their devices.
692 At the time of this writing there are two ways to define power management
694 dev_pm_ops structure described in Documentation/driver-api/pm/devices.rst, and
697 runtime power management callbacks and is not really suitable for any new
702 containing pointers to power management (PM) callbacks that will be executed by
718 (when a hibernation image is about to be created), during power-off after
731 in Documentation/driver-api/pm/notifiers.rst).
740 low-power state by the PCI subsystem.  It is not required (in fact it even is
743 put it into a low-power state.  All of these operations can very well be taken
750 low-power state, respectively.  Moreover, if the driver calls pci_save_state(),
756 can be invoked to handle an interrupt from the device, so all suspend-related
775 The freeze() callback is hibernation-specific and is executed in two situations,
783 the driver takes the responsibility for putting the device into a low-power
787 or put it into a low-power state.  Still, either it or freeze_noirq() should
793 The freeze_noirq() callback is hibernation-specific.  It is executed during
810 The poweroff() callback is hibernation-specific.  It is executed when the system
818 into a low-power state itself instead of allowing the PCI subsystem to do that,
821 into a low-power state, respectively, but it need not save the device's standard
827 The poweroff_noirq() callback is hibernation-specific.  It is executed after
841 PM core has enabled the non-boot CPUs.  The driver's interrupt handler will not
845 Since the PCI subsystem unconditionally puts all devices into the full power
858 This callback is responsible for restoring the pre-suspend configuration of the
865 The thaw_noirq() callback is hibernation-specific.  It is executed after a
866 system image has been created and the non-boot CPUs have been enabled by the PM
869 after enabling the non-boot CPUs).  The driver's interrupt handler will not be
880 The thaw() callback is hibernation-specific.  It is executed after thaw_noirq()
884 This callback is responsible for restoring the pre-freeze configuration of
890 The restore_noirq() callback is hibernation-specific.  It is executed in the
892 the image kernel and the non-boot CPUs have been enabled by the image kernel's
898 suspend-resume cycle.
906 The restore() callback is hibernation-specific.  It is executed after
922   - during system resume, after resume() callbacks have been executed for all
924   - during hibernation, before saving the system image, after thaw() callbacks
926   - during system restore, when the system is going back to its pre-hibernation
939 The runtime_suspend() callback is specific to device runtime power management
941 device is about to be suspended (i.e. quiesced and put into a low-power state)
945 put into a low-power state, but it must allow the PCI subsystem to perform all
946 of the PCI-specific actions necessary for suspending the device.
953 (i.e. put into the full-power state and programmed to process I/O normally) at
957 device after it has been put into the full-power state by the PCI subsystem.
997 3.1.19. Driver Flags for Power Management
1001 power management for the devices by the core itself and by middle layer code
1007 direct-complete mechanism allowing device suspend/resume callbacks to be skipped
1013 value from pci_pm_prepare() only if the ->prepare callback provided by the
1015 out from using the direct-complete mechanism dynamically (whereas setting
1016 DPM_FLAG_NO_DIRECT_COMPLETE means permanent opt-out).
1021 to avoid resuming the device from runtime suspend unless there are PCI-specific
1024 suspend during the "late" phase of the system-wide transition under way.
1031 in suspend after a system-wide transition into the working state.  This flag is
1032 taken into consideration by the PM core along with the power.may_skip_resume
1040 3.2. Device Runtime Power Management
1041 ------------------------------------
1043 In addition to providing device power management callbacks PCI device drivers
1044 are responsible for controlling the runtime power management (runtime PM) of
1057 device should really be suspended and return -EAGAIN if that is not the case).
1070 zero for the device and it will never be runtime-suspended.  The simplest
1084 should let user space or some platform-specific code do that (user space can
1102 by work items put into the power management workqueue, pm_wq.  Although there
1103 are a few situations in which power management requests are automatically
1106 idle), device drivers are generally responsible for queuing power management
1109 Documentation/power/runtime_pm.rst.
1116 Documentation/power/runtime_pm.rst.
1124 PCI Bus Power Management Interface Specification, Rev. 1.2
1126 Advanced Configuration and Power Interface (ACPI) Specification, Rev. 3.0b
1130 Documentation/driver-api/pm/devices.rst
1132 Documentation/power/runtime_pm.rst