networking/dsa/sja1105.rst

8 The NXP SJA1105 is a family of 10 SPI-managed automotive switches:
10 - SJA1105E: First generation, no TTEthernet
11 - SJA1105T: First generation, TTEthernet
12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
16 - SJA1110A: Third generation, TTEthernet, SGMII, integrated 100base-T1 and
17   100base-TX PHYs
18 - SJA1110B: Third generation, TTEthernet, SGMII, 100base-T1, 100base-TX
19 - SJA1110C: Third generation, TTEthernet, SGMII, 100base-T1, 100base-TX
20 - SJA1110D: Third generation, TTEthernet, SGMII, 100base-T1
23 set-and-forget use, with minimal dynamic interaction at runtime. They
58 Also the configuration is write-only (software cannot read it back from the
78 The hardware tags all traffic internally with a port-based VLAN (pvid), or it
99 Time-aware scheduling
100 ---------------------
103 specified in IEEE 802.1Q-2018 (formerly 802.1Qbv). This means it can be used to
104 ensure deterministic latency for priority traffic that is sent in-band with its
105 gate-open event in the network schedule.
107 This capability can be managed through the tc-taprio offload ('flags 2'). The
113 on the VLAN PCP bits (if no VLAN is present, the port-based default is used).
119 EtherType. In these modes, injecting into a particular TX queue can only be
122 offloaded flows can be steered to TX queues based on the VLAN PCP, but the DSA
123 net devices are no longer able to do that. To inject frames into a hardware TX
125 sub-interface on the DSA conduit port, and send normal (0x8100) VLAN-tagged
128 Management traffic (having DMAC 01-80-C2-xx-xx-xx or 01-19-1B-xx-xx-xx) is the
140   set -e -u -o pipefail
155   if ! systemctl is-active --quiet ptp4l; then
161   # Phase-align the base time to the start of the next second.
162   sec=$(echo "${now}" | gawk -F. '{ print $1; }')
163   base_time="$(((${sec} + 1) * ${NSEC_PER_SEC}))"
169           base-time ${base_time} \
170           sched-entry S $(gatemask 7) 100000 \
171           sched-entry S $(gatemask "0 1 2 3 4 5 6") 400000 \
174 It is possible to apply the tc-taprio offload on multiple egress ports. There
181 --------------------------------------
183 The switch is able to offload flow-based redirection of packets to a set of
189 - VLAN-aware virtual links: these match on destination MAC address, VLAN ID and
191 - VLAN-unaware virtual links: these match on destination MAC address only.
197 actions are requested, the driver creates a "non-critical" virtual link. When
198 the action list also contains tc-gate (more details below), the virtual link
199 becomes "time-critical" (draws frame buffers from a reserved memory partition,
219 Time-based ingress policing
220 ---------------------------
223 similarly to the Per-Stream Filtering and Policing (PSFP) clause specified in
224 IEEE 802.1Q-2018 (formerly 802.1Qci). This means it can be used to perform
225 tight timing-based admission control for up to 1024 flows (identified by a
229 This capability can be managed through the offload of the tc-gate action. As
231 explicit routing of time-critical traffic and does not leave that in the hands
232 of the FDB, flooding etc), the tc-gate action may never appear alone when
236 Example: create a tc-taprio schedule that is phase-aligned with a tc-gate
247           sec=$(echo $now | awk -F. '{print $1}') && \
248           base_time="$(((sec + 2) * 1000000000))" && \
252           action gate base-time ${base_time} \
253           sched-entry OPEN  60000 -1 -1 \
254           sched-entry CLOSE 40000 -1 -1 \
260           sec=$(echo $now | awk -F. '{print $1}') && \
261           base_time="$(((sec + 2) * 1000000000))" && \
267           base-time ${base_time} \
268           sched-entry S 01  50000 \
269           sched-entry S 00  50000 \
273 one used for the tc-taprio offload. Therefore, the restrictions regarding the
274 fact that no two gate actions (either tc-gate or tc-taprio gates) may fire at
277 To come in handy, it is possible to share time-triggered virtual links across
286           base-time 0 \
287           sched-entry OPEN 50000000 -1 -1 \
288           sched-entry CLOSE 50000000 -1 -1 \
293 lack of destination ports and MTU enforcement checks). Byte-level counters are
300 VLAN-unaware, frames carry a different VLAN tag internally, depending on
301 whether the port is standalone or under a VLAN-unaware bridge.
304 driver asks for the VLAN ID and VLAN PCP when the port is under a VLAN-aware
306 whether the port is standalone or in a VLAN-unaware bridge, and accepts only
307 "VLAN-unaware" tc-flower keys (MAC DA).
309 The existing tc-flower keys that are offloaded using virtual links are no
312 - port was standalone and joins a bridge (VLAN-aware or VLAN-unaware)
313 - port is part of a bridge whose VLAN awareness state changes
314 - port was part of a bridge and becomes standalone
315 - port was standalone, but another port joins a VLAN-aware bridge and this
319 existing tc-flower filters either. So for proper operation, the tc-flower
329 RMII PHY role and out-of-band signaling
330 ---------------------------------------
337 On the other hand, the SJA1105 is only binary configurable - when in the RMII
341 In the RMII spec, the PHY can transmit extra out-of-band signals via RXD[1:0].
343 preamble of each frame. The MAC does not have this out-of-band signaling
346 clock signal, inevitably an RMII PHY-to-PHY connection is created. The SJA1105
349 simply encodes the extra symbols received from the SJA1105-as-PHY onto the
350 100Base-Tx wire.
355 The take-away is that in RMII mode, the SJA1105 must be let to drive the
358 RGMII fixed-link and internal delays
359 ------------------------------------
364 When powered up, these can shift the Rx and Tx clocks with a phase difference
373 In the situation where the switch port is connected through an RGMII fixed-link
377 The take-away is that in RGMII mode, the switch's internal delays are only
380 the fixed-link are under control of the same Linux system).
381 As to why would a fixed-link interface ever change link speeds: there are
387 ---------------------------
389 The SJA1105 does not have an MDIO bus and does not perform in-band AN either.
397 internal 100base-T1 PHYs can be accessed from the host. This is, however, not
398 used by the driver, instead the internal 100base-T1 and 100base-TX PHYs are
409 -------------------------
430 1      100base-TX     100base-TX     100base-TX
436        or 2500base-X  or 2500base-X                 or 2500base-X
438        or 2500base-X  or 2500base-X  or 2500base-X  or 2500base-X
439 5      100base-T1     100base-T1     100base-T1     100base-T1
440 6      100base-T1     100base-T1     100base-T1     100base-T1
441 7      100base-T1     100base-T1     100base-T1     100base-T1
442 8      100base-T1     100base-T1     n/a            n/a
443 9      100base-T1     100base-T1     n/a            n/a
444 10     100base-T1     n/a            n/a            n/a