Documentation/i2c/smbus-protocol.rst

14 If you write a driver for some I2C device, please try to use the SMBus
15 commands if at all possible (if the device uses only that subset of the
16 I2C protocol). This makes it possible to use the device driver on both
28 transaction function, a device driver should always check (just once) for
44 Addr  (7 bits)  I2C 7 bit address. Note that this can be expanded to
47                 the device.
52 [..]            Data sent by I2C device, as opposed to data sent by the host
60 This sends a single bit to the device, at the place of the Rd/Wr bit::
62   S Addr Rd/Wr [A] P
72 This reads a single byte from a device, without specifying a device
77   S Addr Rd [A] [Data] NA P
88 to a device.  See Receive Byte for more information.
92   S Addr Wr [A] Data [A] P
102 This reads a single byte from a device, from a designated register.
105   S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] NA P
116 device, from a designated register that is specified through the Comm
119   S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataLow] A [DataHigh] NA P
133 This writes a single byte to a device, to a designated register. The
139   S Addr Wr [A] Comm [A] Data [A] P
150 of data are written to a device, to the designated register that is
153   S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
165 This command selects a device register (through the Comm byte), sends
168   S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
169                               Sr Addr Rd [A] [DataLow] A [DataHigh] NA P
179 This command reads a block of up to 32 bytes from a device, from a
181 of data is specified by the device in the Count byte.
185   S Addr Wr [A] Comm [A]
186             Sr Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
197 a device, to a designated register that is specified through the
202   S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
207 SMBus Block Write - Block Read Process Call
210 SMBus Block Write - Block Read Process Call was introduced in
213 This command selects a device register (through the Comm byte), sends
216   S Addr Wr [A] Comm [A] Count [A] Data [A] ...
217                               Sr Addr Rd [A] [Count] A [Data] ... A P
225 This command is sent from a SMBus device acting as a master to the
228 alerting device's address.
241   client->irq assigned to a Host Notify IRQ if no one else specified another.
251 PEC adds a CRC-8 error-checking byte to transfers using it, immediately
259 the specification. It is a higher-layer protocol which uses the
262 ARP adds device enumeration and dynamic address assignment to
301 This command reads a block of bytes from a device, from a
304   S Addr Wr [A] Comm [A]
305             Sr Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
316 a device, to a designated register that is specified through the
322   S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P