Lines Matching +full:super +full:- +full:set

10     Addresses scanned: none, address read from Super I/O config space
18     Addresses scanned: none, address read from Super I/O config space
26     Addresses scanned: none, address read from Super I/O config space
44 -----------
46 The Fintek F71805F/FG Super I/O chip includes complete hardware monitoring
53 The Fintek F71872F/FG Super I/O chip is almost the same, with two
57 The Fintek F71806F/FG Super-I/O chip is essentially the same as the
65 ------------------
67 Voltages are sampled by an 8-bit ADC with a LSB of 8 mV. The supported
75 you can only set the limits in steps of 32 mV (before scaling).
84 in1     VIN1    VTT1.2V      10K       -        1.00    1.20 V
89 in6     VIN6    VCC1.5V      10K       -        1.00    1.50 V
90 in7     VIN7    VCORE        10K       -        1.00   ~1.40 V [1]_
111 --------------
113 Fan rotation speeds are reported as 12-bit values from a gated clock
119 The chip assumes 2 pulse-per-revolution fans.
126 ----------------------
141 -----------
143 Both PWM (pulse-width modulation) and DC fan speed control methods are
145 motherboard, so the driver assumes that the BIOS set the method
152 control, but may generate annoying high-pitch noise. So a frequency just