Lines Matching refs:UDC

11 provides support for embedded USB Device Controllers (UDC) that do not
15 Instead, these embedded UDC rely on the USB On-the-Go (OTG)
251 	    pr_err("HS UDC: no transceiver configured\n");
435 Device Controller (UDC):
472 describes the UDC transceiver with a name and id number.
484 The ``jz4740_udc_resources`` resource structure (line 7) defines the UDC
487 The first array (line 9 to 11) defines the UDC registers base memory
492 defines the UDC IRQ registers addresses. Since there is only one IRQ
493 register available for the JZ4740 UDC, start and end point at the same
500 describes the UDC itself.
517 With this quick overview of the UDC platform data at the ``arch/`` level now
545 member (line 3) is set to 0 (equivalent to false) since the JZ4740 UDC
580 The JZ4740 UDC exhibits such quirks, some of which we will discuss here
593 	    pr_err("HS UDC: no transceiver configured\n");