Lines Matching full:muxing
280 may be muxing several GPIO ranges (typically SoCs that have one set of pins,
373 For all functionalities dealing with pin biasing, pin muxing etc, the pin
681 In the example activating muxing 0 and 2 at the same time setting bits
715 that driver request proper muxing and other control for its pins.
762 configuration and muxing logic can be constructed in several ways. Here
827 - Registers (or fields within registers) that control muxing of signals
934 configuration and the muxing of the "u0" or "gpio-mode" group onto these
941 specific muxing or configuration rather than anything related to the GPIO
1081 Further it is possible for one named state to affect the muxing of several
1185 ``PINCTRL_STATE_SLEEP`` at runtime, re-biasing or even re-muxing pins to save
1307 setting up the config and muxing for the pins right before the device is