driver-api/gpio/intro.rst

6 GPIO Interfaces
14 What is a GPIO?
17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
19 to Linux developers working with embedded and custom hardware. Each GPIO
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
30 also "GPIO Expander" chips that connect using the I2C or SPI serial buses.
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36   - Output values are writable (high=1, low=0). Some chips also have
38     value might be driven, supporting "wire-OR" and similar schemes for the
39     other value (notably, "open drain" signaling).
41   - Input values are likewise readable (1, 0). Some chips support readback
42     of pins configured as "output", which is very useful in such "wire-OR"
43     cases (to support bidirectional signaling). GPIO controllers may have
44     input de-glitch/debounce logic, sometimes with software controls.
46   - Inputs can often be used as IRQ signals, often edge triggered but
50   - Usually a GPIO will be configurable as either input or output, as needed
53   - Most GPIOs can be accessed while holding spinlocks, but those accessed
56 On a given board each GPIO is used for one specific purpose like monitoring
57 MMC/SD card insertion/removal, detecting card write-protect status, driving
58 a LED, configuring a transceiver, bit-banging a serial bus, poking a hardware
62 Common GPIO Properties
65 These properties are met through all the other documents of the GPIO interface
66 and it is useful to understand them, especially if you need to define GPIO
69 Active-High and Active-Low
70 --------------------------
71 It is natural to assume that a GPIO is "active" when its output signal is 1
73 GPIO may be inverted before is reaches its destination, or a device could decide
75 be transparent to device drivers, therefore it is possible to define a GPIO as
76 being either active-high ("1" means "active", the default) or active-low ("0"
80 Open Drain and Open Source
81 --------------------------
82 Sometimes shared signals need to use "open drain" (where only the low signal
83 level is actually driven), or "open source" (where only the high signal level is
84 driven) signaling. That term applies to CMOS transistors; "open collector" is
86 This is sometimes called a "wire-AND"; or more practically, from the negative
87 logic (low=true) perspective this is a "wire-OR".
89 One common example of an open drain signal is a shared active-low IRQ line.
90 Also, bidirectional data bus signals sometimes use open drain signals.
92 Some GPIO controllers directly support open drain and open source outputs; many
93 don't. When you need open drain signaling but your hardware doesn't directly
94 support it, there's a common idiom you can use to emulate it with any GPIO pin
97  **LOW**: ``gpiod_direction_output(gpio, 0)`` ... this drives the signal and
100  **HIGH**: ``gpiod_direction_input(gpio)`` ... this turns off the output, so
103 The same logic can be applied to emulate open source signaling, by driving the
104 high signal and configuring the GPIO as input for low. This open drain/open
105 source emulation can be handled transparently by the GPIO framework.
107 If you are "driving" the signal high but gpiod_get_value(gpio) reports a low