Lines Matching full:topology

21 assemble them into a CXL.mem decode topology. The need for runtime configuration
22 of the CXL.mem topology is also similar to RAID in that different environments
23 with the same hardware configuration may decide to assemble the topology in
26 and disable any striping in the CXL.mem topology.
29 (Linux term for the top of the CXL decode topology). From there, PCIe topology
38 Here is a sample listing of a CXL topology defined by 'cxl_test'. The 'cxl_test'
39 module generates an emulated CXL topology of 2 Host Bridges each with 2 Root
190 Continuing the RAID analogy, disks have both topology metadata and on device
191 metadata that determine RAID set assembly. CXL Port topology and CXL Port link
192 status is metadata for CXL.mem set assembly. The CXL Port topology is enumerated
249 ...which queries the CXL topology to ask "given CXL Memory Expander with a kernel