Lines Matching +full:rtd +full:- +full:dwc3
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/realtek,rtd-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Realtek DWC3 USB SoC Controller Glue
11 - Stanley Chang <stanley_chang@realtek.com>
14 The Realtek DHC SoC embeds a DWC3 USB IP Core configured for USB 2.0
15 and USB 3.0 in host or dual-role mode.
20 - enum:
21 - realtek,rtd1295-dwc3
22 - realtek,rtd1315e-dwc3
23 - realtek,rtd1319-dwc3
24 - realtek,rtd1319d-dwc3
25 - realtek,rtd1395-dwc3
26 - realtek,rtd1619-dwc3
27 - realtek,rtd1619b-dwc3
28 - const: realtek,rtd-dwc3
32 - description: Address and length of register set for wrapper of dwc3 core.
33 - description: Address and length of register set for pm control.
35 '#address-cells':
38 '#size-cells':
44 "^usb@[0-9a-f]+$":
45 $ref: snps,dwc3.yaml#
49 - compatible
50 - reg
51 - "#address-cells"
52 - "#size-cells"
53 - ranges
58 - |
60 compatible = "realtek,rtd1319d-dwc3", "realtek,rtd-dwc3";
62 #address-cells = <1>;
63 #size-cells = <1>;
67 compatible = "snps,dwc3";
71 phy-names = "usb2-phy", "usb3-phy";
73 usb-role-switch;
74 role-switch-default-mode = "host";
76 snps,parkmode-disable-ss-quirk;
77 snps,parkmode-disable-hs-quirk;
78 maximum-speed = "high-speed";