Lines Matching full:bpmp
145 clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>,
146 <&bpmp TEGRA186_CLK_XUSB_FALCON>,
147 <&bpmp TEGRA186_CLK_XUSB_SS>,
148 <&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
149 <&bpmp TEGRA186_CLK_CLK_M>,
150 <&bpmp TEGRA186_CLK_XUSB_FS>,
151 <&bpmp TEGRA186_CLK_PLLU>,
152 <&bpmp TEGRA186_CLK_CLK_M>,
153 <&bpmp TEGRA186_CLK_PLLE>;
157 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>,
158 <&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;