bindings/ufs/hisilicon%2Cufs.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Li Wei <liwei213@huawei.com>
18           - hisilicon,hi3660-ufs
19           - hisilicon,hi3670-ufs
21     - compatible
24   - $ref: ufs-common.yaml
29       - items:
30           - const: hisilicon,hi3660-ufs
31           - const: jedec,ufs-1.1
32       - items:
33           - enum:
34               - hisilicon,hi3670-ufs
35           - const: jedec,ufs-2.1
41   clock-names:
43       - const: ref_clk
44       - const: phy_clk
48       - description: UFS register address space
49       - description: UFS SYS CTRL register address space
54   reset-names:
56       - const: rst
59   - compatible
60   - reg
61   - resets
62   - reset-names
67   - |
68     #include <dt-bindings/clock/hi3670-clock.h>
69     #include <dt-bindings/interrupt-controller/arm-gic.h>
72         #address-cells = <2>;
73         #size-cells = <2>;
76             compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1";
79             interrupt-parent = <&gic>;
83             clock-names = "ref_clk", "phy_clk";
84             freq-table-hz = <0 0>,
88             reset-names = "rst";