bindings/thermal/qcom-lmh.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-lmh.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Qualcomm Limits Management Hardware(LMh)
11   - Thara Gopinath <thara.gopinath@gmail.com>
14   Limits Management Hardware(LMh) is a hardware infrastructure on some
21       - enum:
22           - qcom,sc8180x-lmh
23           - qcom,sdm845-lmh
24           - qcom,sm8150-lmh
25       - items:
26           - const: qcom,qcm2290-lmh
27           - const: qcom,sm8150-lmh
31       - description: core registers
36   '#interrupt-cells':
39   interrupt-controller: true
43       phandle of the first cpu in the LMh cluster
46   qcom,lmh-temp-arm-millicelsius:
48       An integer expressing temperature threshold at which the LMh thermal
51   qcom,lmh-temp-low-millicelsius:
56   qcom,lmh-temp-high-millicelsius:
62   - compatible
63   - reg
64   - interrupts
65   - '#interrupt-cells'
66   - interrupt-controller
67   - cpus
68   - qcom,lmh-temp-arm-millicelsius
69   - qcom,lmh-temp-low-millicelsius
70   - qcom,lmh-temp-high-millicelsius
75   - |
76     #include <dt-bindings/interrupt-controller/arm-gic.h>
78     lmh@17d70800 {
79       compatible = "qcom,sdm845-lmh";
83       qcom,lmh-temp-arm-millicelsius = <65000>;
84       qcom,lmh-temp-low-millicelsius = <94500>;
85       qcom,lmh-temp-high-millicelsius = <95000>;
86       interrupt-controller;
87       #interrupt-cells = <1>;