bindings/spi/rockchip-sfc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/rockchip-sfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Serial Flash Controller (SFC)
10   - Heiko Stuebner <heiko@sntech.de>
11   - Chris Morgan <macromorgan@hotmail.com>
14   - $ref: spi-controller.yaml#
18     const: rockchip,sfc
20       The rockchip sfc controller is a standalone IP with version register,
32       - description: Bus Clock
33       - description: Module Clock
35   clock-names:
37       - const: clk_sfc
38       - const: hclk_sfc
40   power-domains:
43   rockchip,sfc-no-dma:
44     description: Disable DMA and utilize FIFO mode only
48   "^flash@[0-3]$":
58   - compatible
59   - reg
60   - interrupts
61   - clocks
62   - clock-names
67   - |
68     #include <dt-bindings/clock/px30-cru.h>
69     #include <dt-bindings/interrupt-controller/arm-gic.h>
70     #include <dt-bindings/power/px30-power.h>
72     sfc: spi@ff3a0000 {
73         compatible = "rockchip,sfc";
77         clock-names = "clk_sfc", "hclk_sfc";
78         pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>;
79         pinctrl-names = "default";
80         power-domains = <&power PX30_PD_MMC_NAND>;
81         #address-cells = <1>;
82         #size-cells = <0>;
85             compatible = "jedec,spi-nor";
87             spi-max-frequency = <108000000>;
88             spi-rx-bus-width = <2>;
89             spi-tx-bus-width = <2>;