bindings/spi/renesas%2Crzv2m-csi.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,rzv2m-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/V2M Clocked Serial Interface (CSI)
10   - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11   - Geert Uytterhoeven <geert+renesas@glider.be>
14   - $ref: spi-controller.yaml#
18     const: renesas,rzv2m-csi
28       - description: The clock used to generate the output clock (CSICLK)
29       - description: Internal clock to access the registers (PCLK)
31   clock-names:
33       - const: csiclk
34       - const: pclk
39   power-domains:
42   renesas,csi-no-ss:
45       The CSI Slave Selection (SS) pin won't be used to enable transmission and
49   - compatible
50   - reg
51   - interrupts
52   - clocks
53   - clock-names
54   - resets
55   - power-domains
56   - '#address-cells'
57   - '#size-cells'
60   renesas,csi-no-ss: [ spi-slave ]
65   - |
66     #include <dt-bindings/interrupt-controller/arm-gic.h>
67     #include <dt-bindings/clock/r9a09g011-cpg.h>
69         compatible = "renesas,rzv2m-csi";
74         clock-names = "csiclk", "pclk";
76         power-domains = <&cpg>;
77         #address-cells = <1>;
78         #size-cells = <0>;