Lines Matching +full:quadspi +full:- +full:memory
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/spi/atmel,quadspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tudor Ambarus <tudor.ambarus@linaro.org>
13 - $ref: spi-controller.yaml#
18 - atmel,sama5d2-qspi
19 - microchip,sam9x60-qspi
20 - microchip,sama7g5-qspi
21 - microchip,sama7g5-ospi
25 - description: base registers
26 - description: mapped memory
28 reg-names:
30 - const: qspi_base
31 - const: qspi_mmap
36 - description: peripheral clock
37 - description: system clock or generic clock, if available
39 clock-names:
42 - const: pclk
43 - enum: [ qspick, gclk ]
50 - description: tx DMA channel
51 - description: rx DMA channel
53 dma-names:
55 - const: tx
56 - const: rx
58 '#address-cells':
61 '#size-cells':
65 - compatible
66 - reg
67 - reg-names
68 - interrupts
69 - clocks
70 - clock-names
71 - '#address-cells'
72 - '#size-cells'
77 - |
78 #include <dt-bindings/interrupt-controller/irq.h>
79 #include <dt-bindings/clock/at91.h>
81 compatible = "atmel,sama5d2-qspi";
83 reg-names = "qspi_base", "qspi_mmap";
86 clock-names = "pclk";
87 #address-cells = <1>;
88 #size-cells = <0>;
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_spi0_default>;
93 compatible = "jedec,spi-nor";
94 spi-max-frequency = <50000000>;
96 spi-rx-bus-width = <4>;
97 spi-tx-bus-width = <4>;