Lines Matching +full:cpvdd +full:- +full:supply
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
13 - $ref: dai-common.yaml#
18 - ti,pcm5121
19 - ti,pcm5122
20 - ti,pcm5141
21 - ti,pcm5142
22 - ti,pcm5242
23 - ti,tas5754
24 - ti,tas5756
29 AVDD-supply: true
31 DVDD-supply: true
33 CPVDD-supply: true
38 absent the device will be configured to clock from BCLK. If pll-in and
39 pll-out are specified in addition to a clock, the device is configured to
42 '#sound-dai-cells':
45 pll-in:
47 device will be configured for clock input on the given pll-in pin.
52 pll-out:
54 device will be configured for PLL output on the given pll-out pin. An
55 external connection from the pll-out pin to the SCLK pin is assumed.
61 - compatible
62 - reg
63 - AVDD-supply
64 - DVDD-supply
65 - CPVDD-supply
72 - ti,tas5754
73 - ti,tas5756
77 pll-in:
80 pll-out:
86 - |
88 #address-cells = <1>;
89 #size-cells = <0>;
93 AVDD-supply = <®_3v3_analog>;
94 DVDD-supply = <®_1v8>;
95 CPVDD-supply = <®_3v3>;
96 #sound-dai-cells = <0>;
98 pll-in = <3>;
99 pll-out = <6>;