bindings/sound/everest%2Ces8326.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - David Yang <yangxiaohua@everest-semi.com>
21       - description: clock for master clock (MCLK)
23   clock-names:
25       - const: mclk
27   "#sound-dai-cells":
30   everest,jack-pol:
33       just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
40   everest,mic1-src:
49   everest,mic2-src:
58   everest,jack-detect-inverted:
61       Defined to invert the jack detection.
63   everest,interrupt-src:
68       Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0,
70       Bit(4) 1 means PIN27 is the irq source for jack detection.
77   everest,interrupt-clk:
81      Bit(0-3) 0 means irq pulse equals 512*internal clock
88      Bit(6) 1 means the chip do not detect jack type after button released.
89        0 means the chip detect jack type again after button released.
95   - compatible
96   - reg
97   - "#sound-dai-cells"
102   - |
104       #address-cells = <1>;
105       #size-cells = <0>;
110         clock-names = "mclk";
111         #sound-dai-cells = <0>;
112         everest,jack-pol = [0e];
113         everest,interrupt-src = [08];
114         everest,interrupt-clk = [00];