soc/qcom/qcom%2Crpm-master-stats.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpm-master-stats.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. (QTI) RPM Master Stats
10   - Konrad Dybcio <konradybcio@kernel.org>
13   The Qualcomm RPM (Resource Power Manager) architecture includes a concept
14   of "RPM Masters". They can be thought of as "the local gang leaders", usually
15   spanning a single subsystem (e.g. APSS, ADSP, CDSP). All of the RPM decisions
16   (particularly around entering hardware-driven low power modes: XO shutdown
17   and total system-wide power collapse) are first made at Master-level, and
21   our device has entered the desired low-power mode, how long it took to do so,
26   This scheme has been used on various SoCs in the 2013-2023 era, with some
27   newer or higher-end designs providing this information through an SMEM query.
31     const: qcom,rpm-master-stats
33   qcom,rpm-msg-ram:
34     $ref: /schemas/types.yaml#/definitions/phandle-array
35     description: Phandle to an RPM MSG RAM slice containing the master stats
41   qcom,master-names:
42     $ref: /schemas/types.yaml#/definitions/string-array
44       The name of the RPM Master which owns the MSG RAM slice where this
50   - compatible
51   - qcom,rpm-msg-ram
52   - qcom,master-names
57   - |
59       compatible = "qcom,rpm-master-stats";
60       qcom,rpm-msg-ram = <&apss_master_stats>,
65       qcom,master-names = "APSS",