soc/mediatek/mediatek%2Cwdma.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Matthias Brugger <matthias.bgg@gmail.com>
11   - Moudy Ho <moudy.ho@mediatek.com>
20       - enum:
21           - mediatek,mt8183-mdp3-wdma
26   mediatek,gce-client-reg:
27     $ref: /schemas/types.yaml#/definitions/phandle-array
30         - description: phandle of GCE
31         - description: GCE subsys id
32         - description: register offset
33         - description: register size
34     description: The register of client driver can be configured by gce with
35       4 arguments defined in this property. Each GCE subsys id is mapping to
36       a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
38   mediatek,gce-events:
41       to gce. The event id is defined in the gce header
42       include/dt-bindings/gce/<chip>-gce.h of each chips.
43     $ref: /schemas/types.yaml#/definitions/uint32-array
45   power-domains:
55   - compatible
56   - reg
57   - mediatek,gce-client-reg
58   - mediatek,gce-events
59   - power-domains
60   - clocks
61   - iommus
66   - |
67     #include <dt-bindings/clock/mt8183-clk.h>
68     #include <dt-bindings/gce/mt8183-gce.h>
69     #include <dt-bindings/power/mt8183-power.h>
70     #include <dt-bindings/memory/mt8183-larb-port.h>
72     mdp3_wdma: mdp3-wdma@14006000 {
73       compatible = "mediatek,mt8183-mdp3-wdma";
75       mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
76       mediatek,gce-events = <CMDQ_EVENT_MDP_WDMA0_SOF>,
78       power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;