bindings/serial/qcom%2Cserial-geni-qcom.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Andy Gross <agross@kernel.org>
11   - Bjorn Andersson <bjorn.andersson@linaro.org>
14   - $ref: /schemas/serial/serial.yaml#
19       - qcom,geni-uart
20       - qcom,geni-debug-uart
25   clock-names:
31   interconnect-names:
33       - const: qup-core
34       - const: qup-config
39       - description: UART core irq
40       - description: Wakeup irq (RX GPIO)
42   operating-points-v2: true
44   pinctrl-0: true
45   pinctrl-1: true
47   pinctrl-names:
50       - const: default
51       - const: sleep
53   power-domains:
60   - compatible
61   - clocks
62   - clock-names
63   - interrupts
64   - reg
69   - |
70     #include <dt-bindings/interrupt-controller/arm-gic.h>
71     #include <dt-bindings/clock/qcom,gcc-sc7180.h>
72     #include <dt-bindings/interconnect/qcom,sc7180.h>
75         compatible = "qcom,geni-uart";
78         clock-names = "se";
79         clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
80         pinctrl-0 = <&qup_uart0_default>;
81         pinctrl-names = "default";
84         interconnect-names = "qup-core", "qup-config";