Lines Matching +full:qcom +full:- +full:sm8550 +full:- +full:lpass +full:- +full:state

1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8550 Peripheral Authentication Service
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 Qualcomm SM8550 SoC Peripheral Authentication Service loads and boots firmware
19 - qcom,sdx75-mpss-pas
20 - qcom,sm8550-adsp-pas
21 - qcom,sm8550-cdsp-pas
22 - qcom,sm8550-mpss-pas
23 - qcom,sm8650-adsp-pas
24 - qcom,sm8650-cdsp-pas
25 - qcom,sm8650-mpss-pas
26 - qcom,x1e80100-adsp-pas
27 - qcom,x1e80100-cdsp-pas
34 - description: XO clock
36 clock-names:
38 - const: xo
40 qcom,qmp:
42 description: Reference to the AOSS side-channel message RAM.
44 smd-edge: false
46 firmware-name:
47 $ref: /schemas/types.yaml#/definitions/string-array
49 - description: Firmware name of the Hexagon core
50 - description: Firmware name of the Hexagon Devicetree
52 memory-region:
55 - description: Memory region for main Firmware authentication
56 - description: Memory region for Devicetree Firmware authentication
57 - description: DSM Memory region
58 - description: DSM Memory region 2
59 - description: Memory region for Qlink Logging
62 - compatible
63 - reg
64 - memory-region
67 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
68 - if:
72 - qcom,sm8550-adsp-pas
73 - qcom,sm8550-cdsp-pas
74 - qcom,sm8650-adsp-pas
75 - qcom,x1e80100-adsp-pas
76 - qcom,x1e80100-cdsp-pas
81 interrupt-names:
83 memory-region:
85 - if:
89 - qcom,sm8650-cdsp-pas
94 interrupt-names:
96 memory-region:
99 - if:
103 - qcom,sm8550-mpss-pas
108 interrupt-names:
110 memory-region:
113 - if:
117 - qcom,sdx75-mpss-pas
118 - qcom,sm8650-mpss-pas
123 interrupt-names:
125 memory-region:
129 - if:
133 - qcom,sm8550-adsp-pas
134 - qcom,sm8650-adsp-pas
135 - qcom,x1e80100-adsp-pas
138 power-domains:
140 - description: LCX power domain
141 - description: LMX power domain
142 power-domain-names:
144 - const: lcx
145 - const: lmx
147 - if:
151 - qcom,sdx75-mpss-pas
152 - qcom,sm8550-mpss-pas
153 - qcom,sm8650-mpss-pas
156 power-domains:
158 - description: CX power domain
159 - description: MSS power domain
160 power-domain-names:
162 - const: cx
163 - const: mss
164 - if:
168 - qcom,sm8550-cdsp-pas
169 - qcom,sm8650-cdsp-pas
170 - qcom,x1e80100-cdsp-pas
173 power-domains:
175 - description: CX power domain
176 - description: MXC power domain
177 - description: NSP power domain
178 power-domain-names:
180 - const: cx
181 - const: mxc
182 - const: nsp
187 - |
188 #include <dt-bindings/clock/qcom,rpmh.h>
189 #include <dt-bindings/interrupt-controller/irq.h>
190 #include <dt-bindings/mailbox/qcom-ipcc.h>
193 compatible = "qcom,sm8550-adsp-pas";
197 clock-names = "xo";
199 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
204 interrupt-names = "wdog", "fatal", "ready",
205 "handover", "stop-ack";
207 memory-region = <&adsp_mem>, <&dtb_adsp_mem>;
209 firmware-name = "qcom/sm8550/adsp.mbn",
210 "qcom/sm8550/adsp_dtb.mbn";
212 power-domains = <&rpmhpd_sm8550_lcx>,
214 power-domain-names = "lcx", "lmx";
216 qcom,qmp = <&aoss_qmp>;
217 qcom,smem-states = <&smp2p_adsp_out 0>;
218 qcom,smem-state-names = "stop";
220 glink-edge {
221 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
226 label = "lpass";
227 qcom,remote-pid = <2>;