bindings/remoteproc/qcom%2Csdx55-pas.yaml

1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdx55-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19       - qcom,sdx55-mpss-pas
26       - description: XO clock
28   clock-names:
30       - const: xo
35   interrupt-names:
38   power-domains:
40       - description: CX power domain
41       - description: MSS power domain
43   power-domain-names:
45       - const: cx
46       - const: mss
48   memory-region:
50     description: Reference to the reserved-memory for the Hexagon core
54     description: Reference to the AOSS side-channel message RAM.
56   smd-edge: false
58   firmware-name:
63   - compatible
64   - reg
65   - memory-region
68   - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
73   - |
74     #include <dt-bindings/clock/qcom,rpmh.h>
75     #include <dt-bindings/interrupt-controller/arm-gic.h>
76     #include <dt-bindings/power/qcom-rpmpd.h>
79         compatible = "qcom,sdx55-mpss-pas";
83         clock-names = "xo";
85         interrupts-extended = <&intc GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
91         interrupt-names = "wdog", "fatal", "ready", "handover",
92                           "stop-ack", "shutdown-ack";
94         memory-region = <&mpss_adsp_mem>;
96         power-domains = <&rpmhpd SDX55_CX>, <&rpmhpd SDX55_MSS>;
97         power-domain-names = "cx", "mss";
99         qcom,smem-states = <&modem_smp2p_out 0>;
100         qcom,smem-state-names = "stop";
102         glink-edge {
106             qcom,remote-pid = <1>;