bindings/remoteproc/qcom%2Cqcs404-cdsp-pil.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-cdsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Bjorn Andersson <bjorn.andersson@linaro.org>
19       - qcom,qcs404-cdsp-pil
21   reg:
28       - description: Watchdog interrupt
29       - description: Fatal interrupt
30       - description: Ready interrupt
31       - description: Handover interrupt
32       - description: Stop acknowledge interrupt
34   interrupt-names:
36       - const: wdog
37       - const: fatal
38       - const: ready
39       - const: handover
40       - const: stop-ack
44       - description: XO clock
45       - description: SWAY clock
46       - description: TBU clock
47       - description: BIMC clock
48       - description: AHB AON clock
49       - description: Q6SS SLAVE clock
50       - description: Q6SS MASTER clock
51       - description: Q6 AXIM clock
53   clock-names:
55       - const: xo
56       - const: sway
57       - const: tbu
58       - const: bimc
59       - const: ahb_aon
60       - const: q6ss_slave
61       - const: q6ss_master
62       - const: q6_axim
64   power-domains:
66       - description: CX power domain
70       - description: AOSS restart
72   reset-names:
74       - const: restart
76   memory-region:
78     description: Reference to the reserved-memory for the Hexagon core
80   qcom,halt-regs:
81     $ref: /schemas/types.yaml#/definitions/phandle-array
83       Phandle reference to a syscon representing TCSR followed by the
86       - items:
87           - description: phandle to TCSR syscon region
88           - description: offset to the Q6 halt register
90   qcom,smem-states:
91     $ref: /schemas/types.yaml#/definitions/phandle-array
94       - description: Stop the modem
96   qcom,smem-state-names:
99       - const: stop
102   - compatible
103   - reg
104   - interrupts
105   - interrupt-names
106   - clocks
107   - clock-names
108   - power-domains
109   - resets
110   - reset-names
111   - qcom,halt-regs
112   - memory-region
113   - qcom,smem-states
114   - qcom,smem-state-names
119   - |
120     #include <dt-bindings/interrupt-controller/arm-gic.h>
121     #include <dt-bindings/clock/qcom,gcc-qcs404.h>
122     #include <dt-bindings/power/qcom-rpmpd.h>
123     #include <dt-bindings/clock/qcom,turingcc-qcs404.h>
125         compatible = "qcom,qcs404-cdsp-pil";
126         reg = <0x00b00000 0x4040>;
128         interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,
133         interrupt-names = "wdog", "fatal", "ready",
134                           "handover", "stop-ack";
144         clock-names = "xo",
153         power-domains = <&rpmhpd SDM845_CX>;
156         reset-names = "restart";
158         qcom,halt-regs = <&tcsr 0x19004>;
160         memory-region = <&cdsp_fw_mem>;
162         qcom,smem-states = <&cdsp_smp2p_out 0>;
163         qcom,smem-state-names = "stop";