bindings/pwm/pwm-sifive.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SiFive PWM controller
11   - Paul Walmsley <paul.walmsley@sifive.com>
14   Unlike most other PWM controllers, the SiFive PWM controller currently
15   only supports one period for all channels in the PWM. All PWMs need to
18   achievable period. PWM RTL that corresponds to the IP block version
19   numbers can be found here -
21   https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
24   - $ref: pwm.yaml#
29       - enum:
30           - sifive,fu540-c000-pwm
31           - sifive,fu740-c000-pwm
32       - const: sifive,pwm0
34       Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
35       compatible strings are "sifive,fu540-c000-pwm" and
36       "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
38       SiFive PWM v0 IP block with no chip integration tweaks.
39       Please refer to sifive-blocks-ip-versioning.txt for details.
47   "#pwm-cells":
53       Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
56   - compatible
57   - reg
58   - clocks
59   - interrupts
64   - |
65     pwm:  pwm@10020000 {
66       compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
69       interrupt-parent = <&plic>;
71       #pwm-cells = <3>;