bindings/pwm/opencores%2Cpwm.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - William Qiu <william.qiu@starfivetech.com>
14   mode, the PTC core generates binary signal with user-programmable low and
15   high periods. All PTC counters and registers are 32-bit.
18   - $ref: pwm.yaml#
23       - enum:
24           - starfive,jh7100-pwm
25           - starfive,jh7110-pwm
26           - starfive,jh8100-pwm
27       - const: opencores,pwm-v1
38   "#pwm-cells":
42   - compatible
43   - reg
44   - clocks
49   - |
51         compatible = "starfive,jh7110-pwm", "opencores,pwm-v1";
53         clocks = <&clkgen 181>;
55         #pwm-cells = <3>;