Lines Matching +full:single +full:- +full:port
3 RapidIO port node:
5 - compatible
11 Optionally, a compatible string of "fsl,srio-vX.Y" where X is Major
15 - reg
17 Value type: <prop-encoded-array>
22 - interrupts
24 Value type: <prop_encoded-array>
30 A single IRQ that handles error conditions is specified by this
31 property. (Typically shared with port-write).
33 - fsl,srio-rmu-handle:
36 Definition: A single <phandle> value that points to the RMU.
37 (See srio-rmu.txt for more details on RMU node binding)
39 Port Child Nodes: There should a port child node for each port that exists in
43 - cell-index
46 Definition: A standard property. Matches the port id.
48 - ranges
50 Value type: <prop-encoded-array>
54 SRIO port.
56 - fsl,liodn
57 Usage: optional-but-recommended (for devices with PAMU)
58 Value type: <prop-encoded-array>
64 memory and maintenance transactions then a single LIODN is
73 for the port.
81 #address-cells = <2>;
82 #size-cells = <2>;
86 fsl,srio-rmu-handle = <&rmu>;
90 cell-index = <1>;
91 #address-cells = <2>;
92 #size-cells = <2>;
98 cell-index = <2>;
99 #address-cells = <2>;
100 #size-cells = <2>;