Lines Matching +full:deep +full:- +full:sleep

4 - compatible: "fsl,<chip>-pmc".
6 "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
7 compatible. "fsl,mpc8313-pmc" should also be listed for any chip
8 whose PMC is compatible, and implies deep-sleep capability.
10 "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
11 compatible. "fsl,mpc8536-pmc" should also be listed for any chip
12 whose PMC is compatible, and implies deep-sleep capability.
14 "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
15 compatible; all statements below that apply to "fsl,mpc8548-pmc" also
16 apply to "fsl,mpc8641d-pmc".
19 bit assignments are indicated via the sleep specifier in each device's
20 sleep property.
22 - reg: For devices compatible with "fsl,mpc8349-pmc", the first resource
26 For devices compatible with "fsl,mpc8548-pmc", the first resource
27 is a 32-byte block beginning with DEVDISR.
29 - interrupts: For "fsl,mpc8349-pmc"-compatible devices, the first
32 - fsl,mpc8313-wakeup-timer: For "fsl,mpc8313-pmc"-compatible devices,
34 a wakeup source from deep sleep.
36 Sleep specifiers:
38 fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit
40 and cleared on suspend, and restored on resume. This sleep controller
43 fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of
45 upon resume. The first two cells are as described for fsl,mpc8578-pmc.
46 This sleep controller only supports disabling devices during system
47 sleep, or permanently.
49 fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the
51 DEVDISR2, if present -- this cell should be zero or absent if the
53 disabling. This sleep controller does not support configuring devices
54 to disable during system sleep (unless supported by another compatible
60 compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";