bindings/pinctrl/qcom%2Csm4450-tlmm.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm4450-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Tengfei Fan <quic_tengfan@quicinc.com>
16   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20     const: qcom,sm4450-tlmm
26   interrupt-controller: true
27   "#interrupt-cells": true
28   gpio-controller: true
30   gpio-reserved-ranges:
34   gpio-line-names:
37   "#gpio-cells": true
38   gpio-ranges: true
39   wakeup-parent: true
42   "-state$":
44       - $ref: "#/$defs/qcom-sm4450-tlmm-state"
45       - patternProperties:
46           "-pins$":
47             $ref: "#/$defs/qcom-sm4450-tlmm-state"
51   qcom-sm4450-tlmm-state:
56     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
62           List of gpio pins affected by the properties specified in this
63           subnode.
66             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-5])$"
67             - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
75         enum: [ gpio, atest_char, atest_usb0, audio_ref_clk, cam_mclk,
95           - pins
98   - compatible
99   - reg
104   - |
105     #include <dt-bindings/interrupt-controller/arm-gic.h>
107         compatible = "qcom,sm4450-tlmm";
109         gpio-controller;
110         #gpio-cells = <2>;
111         gpio-ranges = <&tlmm 0 0 137>;
112         interrupt-controller;
113         #interrupt-cells = <2>;
116         gpio-wo-state {
118             function = "gpio";
121         uart-w-state {
122             rx-pins {
125                 bias-pull-up;
128             tx-pins {
131                 bias-disable;