Lines Matching +full:qcom +full:- +full:sc8180x +full:- +full:tlmm +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8180x-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. SC8180X TLMM block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 Top Level Mode Multiplexer pin controller in Qualcomm SC8180X SoC.
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
20 const: qcom,sc8180x-tlmm
25 reg-names:
27 - const: west
28 - const: east
29 - const: south
34 gpio-reserved-ranges: true
37 "-state$":
39 - $ref: "#/$defs/qcom-sc8180x-tlmm-state"
40 - patternProperties:
41 "-pins$":
42 $ref: "#/$defs/qcom-sc8180x-tlmm-state"
46 qcom-sc8180x-tlmm-state:
51 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
61 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
62 - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
94 - pins
97 - compatible
98 - reg
99 - reg-names
104 - |
105 #include <dt-bindings/interrupt-controller/arm-gic.h>
107 compatible = "qcom,sc8180x-tlmm";
111 reg-names = "west", "east", "south";
113 gpio-controller;
114 #gpio-cells = <2>;
115 interrupt-controller;
116 #interrupt-cells = <2>;
117 gpio-ranges = <&tlmm 0 0 190>;
119 gpio-wo-subnode-state {
124 uart-w-subnodes-state {
125 rx-pins {
128 bias-pull-up;
131 tx-pins {
134 bias-disable;