bindings/pinctrl/qcom%2Cmsm8660-pinctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8660-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8660 TLMM pin controller
10   - Bjorn Andersson <andersson@kernel.org>
11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14   Top Level Mode Multiplexer pin controller in Qualcomm MSM8660 SoC.
18     const: qcom,msm8660-pinctrl
26   gpio-reserved-ranges:
30   gpio-line-names:
34   "-state$":
36       - $ref: "#/$defs/qcom-msm8660-tlmm-state"
37       - patternProperties:
38           "-pins$":
39             $ref: "#/$defs/qcom-msm8660-tlmm-state"
43   qcom-msm8660-tlmm-state:
48     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
58             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-2])$"
59             - enum: [ sdc3_clk, sdc3_cmd, sdc3_data, sdc4_clk, sdc4_cmd, sdc4_data ]
76                 usb_fs2_oe_n, vfe, vsens_alarm, ebi2, ebi2cs ]
79       - pins
82   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
85   - compatible
86   - reg
91   - |
92     #include <dt-bindings/interrupt-controller/arm-gic.h>
94         compatible = "qcom,msm8660-pinctrl";
97         gpio-controller;
98         gpio-ranges = <&tlmm 0 0 173>;
99         #gpio-cells = <2>;
101         interrupt-controller;
102         #interrupt-cells = <2>;
104         gsbi3-i2c-state {
107             drive-strength = <8>;
108             bias-disable;