bindings/phy/starfive%2Cjh7110-dphy-tx.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-tx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Starfive SoC MIPI D-PHY Tx Controller
10   - Keith Zhao <keith.zhao@starfivetech.com>
11   - Shengyang Chen <shengyang.chen@starfivetech.com>
14   The Starfive SoC uses the MIPI DSI D-PHY based on M31 IP to transfer
19     const: starfive,jh7110-dphy-tx
27   clock-names:
29       - const: txesc
33       - description: MIPITX_DPHY_SYS reset
35   reset-names:
37       - const: sys
39   power-domains:
42   "#phy-cells":
46   - compatible
47   - reg
48   - clocks
49   - clock-names
50   - resets
51   - reset-names
52   - power-domains
53   - "#phy-cells"
58   - |
60       compatible = "starfive,jh7110-dphy-tx";
62       clocks = <&voutcrg 14>;
63       clock-names = "txesc";
65       reset-names = "sys";
66       power-domains = <&aon_syscon 0>;
67       #phy-cells = <0>;