Lines Matching +full:0 +full:xe450

7 title: Rockchip USB2.0 phy with inno IP block
34     const: 0
81         const: 0
104         const: 0
184       reg = <0xe450 0x10>;
188       #clock-cells = <0>;
191         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
193         #phy-cells = <0>;
197         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
198                      <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
199                      <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
201         #phy-cells = <0>;