bindings/phy/phy-rockchip-usbdp.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-usbdp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Frank Wang <frank.wang@rock-chips.com>
11   - Zhang Yubing <yubing.zhang@rock-chips.com>
16       - rockchip,rk3588-usbdp-phy
21   "#phy-cells":
24       - PHY_TYPE_USB3
25       - PHY_TYPE_DP
29     maxItems: 4
31   clock-names:
33       - const: refclk
34       - const: immortal
35       - const: pclk
36       - const: utmi
41   reset-names:
43       - const: init
44       - const: cmn
45       - const: lane
46       - const: pcs_apb
47       - const: pma_apb
49   rockchip,dp-lane-mux:
50     $ref: /schemas/types.yaml#/definitions/uint32-array
52     maxItems: 4
56       An array of physical Type-C lanes indexes. Position of an entry
57       determines the DisplayPort (DP) lane index, while the value of an entry
58       indicates physical Type-C lane. The supported DP lanes number are 2 or 4.
59       e.g. for 2 lanes DP lanes map, we could have "rockchip,dp-lane-mux = <2,
60       3>;", assuming DP lane0 on Type-C phy lane2, DP lane1 on Type-C phy
61       lane3. For 4 lanes DP lanes map, we could have "rockchip,dp-lane-mux =
62       <0, 1, 2, 3>;", assuming DP lane0 on Type-C phy lane0, DP lane1 on Type-C
63       phy lane1, DP lane2 on Type-C phy lane2, DP lane3 on Type-C phy lane3. If
66   rockchip,u2phy-grf:
71   rockchip,usb-grf:
76   rockchip,usbdpphy-grf:
81   rockchip,vo-grf:
85       When select the DP lane mapping will request its phandle.
87   sbu1-dc-gpios:
89       GPIO connected to the SBU1 line of the USB-C connector via a big resistor
93   sbu2-dc-gpios:
95       GPIO connected to the SBU2 line of the USB-C connector via a big resistor
99   orientation-switch:
103   mode-switch:
114   - compatible
115   - reg
116   - clocks
117   - clock-names
118   - resets
119   - reset-names
120   - "#phy-cells"
125   - |
126     #include <dt-bindings/clock/rockchip,rk3588-cru.h>
127     #include <dt-bindings/reset/rockchip,rk3588-cru.h>
130       compatible = "rockchip,rk3588-usbdp-phy";
132       #phy-cells = <1>;
137       clock-names = "refclk", "immortal", "pclk", "utmi";
143       reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
144       rockchip,u2phy-grf = <&usb2phy0_grf>;
145       rockchip,usb-grf = <&usb_grf>;
146       rockchip,usbdpphy-grf = <&usbdpphy0_grf>;
147       rockchip,vo-grf = <&vo0_grf>;