Lines Matching +full:ports +full:- +full:lane +full:- +full:control
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 signals) which connect directly to pins/pads on the SoC package. Each lane
17 documentation. Each such "pad" may control either one or multiple lanes,
18 and thus contains any logic common to all its lanes. Each lane can be
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
25 ports (e.g. PCIe) and the lanes.
27 In addition to per-lane configuration, USB 3.0 ports may require additional
28 settings on a per-board basis.
30 Pads will be represented as children of the top-level XUSB pad controller
31 device tree node. Each lane exposed by the pad will be represented by its
32 own subnode and can be referenced by users of the lane using the standard
33 PHY bindings, as described by the phy-bindings.txt file in this directory.
36 pad controller and the XUSB controller as "ports". This is confusing since
45 const: nvidia,tegra186-xusb-padctl
49 - description: pad controller registers
50 - description: AO registers
54 - description: XUSB pad controller interrupt
56 reg-names:
58 - const: padctl
59 - const: ao
63 - description: pad controller reset
65 reset-names:
67 - const: padctl
69 avdd-pll-erefeut-supply:
73 avdd-usb-supply:
74 description: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must
77 vclamp-usb-supply:
80 vddio-hsic-supply:
102 - description: USB2 tracking clock
104 clock-names:
106 - const: trk
112 usb2-0:
116 "#phy-cells":
120 description: Function selection for this lane.
124 usb2-1:
128 "#phy-cells":
132 description: Function selection for this lane.
136 usb2-2:
140 "#phy-cells":
144 description: Function selection for this lane.
154 - description: HSIC tracking clock
156 clock-names:
158 - const: trk
164 hsic-0:
168 "#phy-cells":
172 description: Function selection for this lane.
184 usb3-0:
188 "#phy-cells":
192 description: Function selection for this lane.
196 usb3-1:
200 "#phy-cells":
204 description: Function selection for this lane.
208 usb3-2:
212 "#phy-cells":
216 description: Function selection for this lane.
220 ports:
221 description: A required child node named "ports" contains a list of
222 subnodes, one for each of the ports exposed by the XUSB pad controller.
232 usb2-0:
237 # match on gpio-usb-b-connector or usb-b-connector and cause
254 usb-role-switch:
261 See ../connector/usb-connector.yaml.
263 vbus-supply:
268 usb-role-switch: [ connector ]
270 usb2-1:
275 # match on gpio-usb-b-connector or usb-b-connector and cause
292 usb-role-switch:
299 See ../connector/usb-connector.yaml.
301 vbus-supply:
306 usb-role-switch: [ connector ]
308 usb2-2:
313 # match on gpio-usb-b-connector or usb-b-connector and cause
330 usb-role-switch:
337 See ../connector/usb-connector.yaml.
339 vbus-supply:
344 usb-role-switch: [ connector ]
346 hsic-0:
350 usb3-0:
360 nvidia,usb2-companion:
362 number to map this super-speed USB port to. The range of
367 vbus-supply:
371 usb3-1:
381 nvidia,usb2-companion:
383 number to map this super-speed USB port to. The range of
388 vbus-supply:
392 usb3-2:
402 nvidia,usb2-companion:
404 number to map this super-speed USB port to. The range of
409 vbus-supply:
416 - compatible
417 - reg
418 - resets
419 - reset-names
420 - avdd-pll-erefeut-supply
421 - avdd-usb-supply
422 - vclamp-usb-supply
423 - vddio-hsic-supply
426 - |
427 #include <dt-bindings/clock/tegra186-clock.h>
428 #include <dt-bindings/gpio/tegra186-gpio.h>
429 #include <dt-bindings/interrupt-controller/arm-gic.h>
430 #include <dt-bindings/reset/tegra186-reset.h>
433 compatible = "nvidia,tegra186-xusb-padctl";
436 reg-names = "padctl", "ao";
440 reset-names = "padctl";
442 avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
443 avdd-usb-supply = <&vdd_3v3_sys>;
444 vclamp-usb-supply = <&vdd_1v8>;
445 vddio-hsic-supply = <&gnd>;
450 clock-names = "trk";
453 usb2-0 {
455 #phy-cells = <0>;
458 usb2-1 {
460 #phy-cells = <0>;
463 usb2-2 {
465 #phy-cells = <0>;
472 clock-names = "trk";
476 hsic-0 {
478 #phy-cells = <0>;
485 usb3-0 {
487 #phy-cells = <0>;
490 usb3-1 {
492 #phy-cells = <0>;
495 usb3-2 {
497 #phy-cells = <0>;
503 ports {
504 usb2-0 {
506 vbus-supply = <&vdd_usb0>;
507 usb-role-switch;
510 compatible = "gpio-usb-b-connector",
511 "usb-b-connector";
512 label = "micro-USB";
514 vbus-gpios = <&gpio TEGRA186_MAIN_GPIO(X, 7) GPIO_ACTIVE_LOW>;
515 id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
519 usb2-1 {
520 vbus-supply = <&vdd_usb1>;
524 usb2-2 {
528 hsic-0 {
532 usb3-0 {
533 nvidia,usb2-companion = <1>;
536 usb3-1 {
540 usb3-2 {