bindings/phy/fsl%2Cimx8mq-usb-phy.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Li Jun <jun.li@nxp.com>
15       - fsl,imx8mq-usb-phy
16       - fsl,imx8mp-usb-phy
21   "#phy-cells":
27   clock-names:
29       - const: phy
31   power-domains:
34   vbus-supply:
38   fsl,phy-tx-vref-tune-percent:
40       Tunes the HS DC level relative to the nominal level
44   fsl,phy-tx-rise-tune-percent:
46       Adjusts the rise/fall time duration of the HS waveform relative to
51   fsl,phy-tx-preemp-amp-tune-microamp:
53       Adjust amount of current sourced to DPn and DMn after a J-to-K
54       or K-to-J transition. Default is 0 (disabled).
58   fsl,phy-tx-vboost-level-microvolt:
60       Adjust the boosted transmit launch pk-pk differential amplitude
64   fsl,phy-comp-dis-tune-percent:
66       Adjust the voltage level used to detect a disconnect event at the host
71   fsl,phy-pcs-tx-deemph-3p5db-attenuation-db:
73       Adjust TX de-emphasis attenuation in dB at nominal
79   fsl,phy-pcs-tx-swing-full-percent:
81       Scaling of the voltage defined by fsl,phy-tx-vboost-level-microvolt
86   - compatible
87   - reg
88   - "#phy-cells"
89   - clocks
90   - clock-names
95   - |
96     #include <dt-bindings/clock/imx8mq-clock.h>
98         compatible = "fsl,imx8mq-usb-phy";
101         clock-names = "phy";
102         #phy-cells = <0>;