bindings/perf/amlogic%2Cg12-ddr-pmu.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/perf/amlogic,g12-ddr-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic G12 DDR performance monitor
10   - Jiucheng Xu <jiucheng.xu@amlogic.com>
13   Amlogic G12 series SoC integrate DDR bandwidth monitor.
21       - amlogic,g12a-ddr-pmu
22       - amlogic,g12b-ddr-pmu
23       - amlogic,sm1-ddr-pmu
27       - description: DMC bandwidth register space.
28       - description: DMC PLL register space.
32       - description: The IRQ of the inside timer timeout.
35   - compatible
36   - reg
37   - interrupts
42   - |
43     #include <dt-bindings/interrupt-controller/arm-gic.h>
44     pmu {
45         #address-cells = <2>;
46         #size-cells = <2>;
48         pmu@ff638000 {
49             compatible = "amlogic,g12a-ddr-pmu";