bindings/pci/xlnx%2Cxdma-host.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/xlnx,xdma-host.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Thippeswamy Havalige <thippeswamy.havalige@amd.com>
13   - $ref: /schemas/pci/pci-host-bridge.yaml#
18       - xlnx,xdma-host-3.00
19       - xlnx,qdma-host-3.00
23       - description: configuration region and XDMA bridge register.
24       - description: QDMA bridge register.
27   reg-names:
29       - const: cfg
30       - const: breg
38       - description: interrupt asserted when miscellaneous interrupt is received.
39       - description: msi0 interrupt asserted when an MSI is received.
40       - description: msi1 interrupt asserted when an MSI is received.
42   interrupt-names:
44       - const: misc
45       - const: msi0
46       - const: msi1
48   interrupt-map-mask:
50       - const: 0
51       - const: 0
52       - const: 0
53       - const: 7
55   interrupt-map:
58   "#interrupt-cells":
61   interrupt-controller:
62     description: identifies the node as an interrupt controller
65       interrupt-controller: true
67       "#address-cells":
70       "#interrupt-cells":
74       - interrupt-controller
75       - "#address-cells"
76       - "#interrupt-cells"
81   - compatible
82   - reg
83   - ranges
84   - interrupts
85   - interrupt-map
86   - interrupt-map-mask
87   - "#interrupt-cells"
88   - interrupt-controller
95           - xlnx,qdma-host-3.00
100     reg-names:
103     - reg-names
108     reg-names:
115   - |
116     #include <dt-bindings/interrupt-controller/arm-gic.h>
117     #include <dt-bindings/interrupt-controller/irq.h>
120         #address-cells = <2>;
121         #size-cells = <2>;
123             compatible = "xlnx,xdma-host-3.00";
127             #address-cells = <3>;
128             #size-cells = <2>;
129             #interrupt-cells = <1>;
131             interrupt-parent = <&gic>;
134             interrupt-names = "misc", "msi0", "msi1";
135             interrupt-map-mask = <0x0 0x0 0x0 0x7>;
136             interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
140             pcie_intc_0: interrupt-controller {
141                 #address-cells = <0>;
142                 #interrupt-cells = <1>;
143                 interrupt-controller;