Lines Matching +full:0 +full:x900000
8 - reg: physical base address (0x79000000) and length (0x900000) for controller
13 interrupt number 0x10 to 0x1f.
27 reg = <0x00 0x79000000 0x0 0x900000>;
28 interrupts = <0x0 0x10 0x4>
29 <0x0 0x11 0x4>
30 <0x0 0x12 0x4>
31 <0x0 0x13 0x4>
32 <0x0 0x14 0x4>
33 <0x0 0x15 0x4>
34 <0x0 0x16 0x4>
35 <0x0 0x17 0x4>
36 <0x0 0x18 0x4>
37 <0x0 0x19 0x4>
38 <0x0 0x1a 0x4>
39 <0x0 0x1b 0x4>
40 <0x0 0x1c 0x4>
41 <0x0 0x1d 0x4>
42 <0x0 0x1e 0x4>
43 <0x0 0x1f 0x4>;
53 reg = < 0x00 0x1f2b0000 0x0 0x00010000 /* Controller registers */
54 0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */
56 ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */
57 0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */
58 dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
59 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
60 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
61 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
62 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
63 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
64 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
66 clocks = <&pcie0clk 0>;