bindings/pci/brcm%2Cstb-pcie.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Brcmstb PCIe Host Controller
10   - Jim Quinlan <james.quinlan@broadcom.com>
15       - enum:
16           - brcm,bcm2711-pcie # The Raspberry Pi 4
17           - brcm,bcm4908-pcie
18           - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19           - brcm,bcm7216-pcie # Broadcom 7216 Arm
20           - brcm,bcm7278-pcie # Broadcom 7278 Arm
21           - brcm,bcm7425-pcie # Broadcom 7425 MIPs
22           - brcm,bcm7435-pcie # Broadcom 7435 MIPs
23           - brcm,bcm7445-pcie # Broadcom 7445 Arm
24           - brcm,bcm7712-pcie # Broadcom STB sibling of Rpi 5
32       - description: PCIe host controller
33       - description: builtin MSI controller
35   interrupt-names:
38       - const: pcie
39       - const: msi
45   dma-ranges:
52   clock-names:
54       - const: sw_pcie
56   msi-controller:
57     description: Identifies the node as an MSI controller.
59   msi-parent:
60     description: MSI controller the device is capable of using.
62   brcm,enable-ssc:
63     description: Indicates usage of spread-spectrum clocking.
66   aspm-no-l0s: true
68   brcm,clkreq-mode:
71       signal.  There are three different modes -- "safe", which drives the
73       not provide any power savings; "no-l1ss" -- which provides Clock
77       potentially hanging the system; "default" -- which provides L0s, L1,
84     enum: [ safe, no-l1ss, default ]
86   brcm,scb-sizes:
88       viewport size of a memory controller.  There may be up to
91       controller supports.  Note that each memory controller
92       may have two component regions -- base and extended -- so
93       this information cannot be deduced from the dma-ranges.
94     $ref: /schemas/types.yaml#/definitions/uint64-array
103   reset-names:
108   - compatible
109   - reg
110   - ranges
111   - dma-ranges
112   - "#interrupt-cells"
113   - interrupts
114   - interrupt-names
115   - interrupt-map-mask
116   - interrupt-map
117   - msi-controller
120   - $ref: /schemas/pci/pci-host-bridge.yaml#
121   - $ref: /schemas/interrupt-controller/msi-controller.yaml#
122   - if:
126             const: brcm,bcm4908-pcie
132         reset-names:
134             - const: perst
137         - resets
138         - reset-names
139   - if:
143             const: brcm,bcm7216-pcie
149         reset-names:
151             - const: rescal
154         - resets
155         - reset-names
157   - if:
161             const: brcm,bcm7712-pcie
168         reset-names:
170             - const: rescal
171             - const: bridge
172             - const: swinit
175         - resets
176         - reset-names
181   - |
182     #include <dt-bindings/interrupt-controller/irq.h>
183     #include <dt-bindings/interrupt-controller/arm-gic.h>
186             #address-cells = <2>;
187             #size-cells = <1>;
189                     compatible = "brcm,bcm2711-pcie";
192                     #address-cells = <3>;
193                     #size-cells = <2>;
194                     #interrupt-cells = <1>;
197                     interrupt-names = "pcie", "msi";
198                     interrupt-map-mask = <0x0 0x0 0x0 0x7>;
199                     interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH
204                     msi-parent = <&pcie0>;
205                     msi-controller;
207                     dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
209                     brcm,enable-ssc;
210                     brcm,scb-sizes =  <0x0000000080000000 0x0000000080000000>;
214                             #address-cells = <3>;
215                             #size-cells = <2>;
219                             vpcie3v3-supply = <&vreg7>;
223                             pci-ep@0,0 {
224                                     assigned-addresses =