bindings/pci/amlogic%2Caxg-pcie.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/amlogic,axg-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Meson AXG DWC PCIe SoC controller
10   - Neil Armstrong <neil.armstrong@linaro.org>
13   Amlogic Meson PCIe host controller is based on the Synopsys DesignWare PCI core.
16   - $ref: /schemas/pci/pci-host-bridge.yaml#
17   - $ref: /schemas/pci/snps,dw-pcie-common.yaml#
19 # We need a select here so we don't match all nodes with 'snps,dw-pcie'
24         - amlogic,axg-pcie
25         - amlogic,g12a-pcie
27     - compatible
32       - enum:
33           - amlogic,axg-pcie
34           - amlogic,g12a-pcie
35       - const: snps,dw-pcie
39       - description: External local bus interface registers
40       - description: Meson designed configuration registers
41       - description: PCIe configuration space
43   reg-names:
45       - const: elbi
46       - const: cfg
47       - const: config
50     maxItems: 1
54       - description: PCIe GEN 100M PLL clock
55       - description: PCIe RC clock gate
56       - description: PCIe PHY clock
58   clock-names:
60       - const: pclk
61       - const: port
62       - const: general
65     maxItems: 1
67   phy-names:
68     const: pcie
72       - description: Port Reset
73       - description: Shared APB reset
75   reset-names:
77       - const: port
78       - const: apb
80   num-lanes:
81     const: 1
83   power-domains:
84     maxItems: 1
87   - compatible
88   - reg
89   - reg-names
90   - interrupts
91   - clock
92   - clock-names
93   - "#address-cells"
94   - "#size-cells"
95   - "#interrupt-cells"
96   - interrupt-map
97   - interrupt-map-mask
98   - ranges
99   - bus-range
100   - device_type
101   - num-lanes
102   - phys
103   - phy-names
104   - resets
105   - reset-names
110   - |
111     #include <dt-bindings/interrupt-controller/irq.h>
112     #include <dt-bindings/interrupt-controller/arm-gic.h>
113     pcie: pcie@f9800000 {
114         compatible = "amlogic,axg-pcie", "snps,dw-pcie";
116         reg-names = "elbi", "cfg", "config";
119         clock-names = "pclk", "port", "general";
121         reset-names = "port", "apb";
123         phy-names = "pcie";
124         #interrupt-cells = <1>;
125         interrupt-map-mask = <0 0 0 0>;
126         interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
127         bus-range = <0x0 0xff>;
128         #address-cells = <3>;
129         #size-cells = <2>;
131         num-lanes = <1>;